ElecEng Handbook Electronic Engineer Reference
HomeTesting

Testing & Measurement

Bench calculators and measurement tips for verifying components and circuits at the workbench.

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Measurement error, probe loading and meter internal resistance affect every reading — understand your instrument before trusting a number.

Frequency ↔ Period

T = 1 / f. Measure a frequency and read the period, or vice-versa.
Hz
s
Frequency f
Period T
Enter either value; the other updates.

AC Voltage: Peak, RMS & Peak-to-Peak

For a sine wave: Vrms = Vp/√2 = Vpp/(2√2). Enter the peak-to-peak value.
V
Peak Vp
RMS Vrms
Sine wave only. For a square wave RMS = Vp, so the ratios differ.

Measured Power (V, I, Power Factor)

Apparent power S = V × I; real power P = V × I × PF.
V
A
Apparent power S
Real power P
PF = cos φ for AC. Use true-RMS meters for accurate V and I readings.

RC Time Constant Measurement

τ = R × C. One time constant reaches 63.2% of the final voltage; 5τ is effectively settled.
Ω
F
Time constant τ
63.2% point
5τ (settled)
To identify an unknown C, back-solve C = τ/R from a measured τ with a known R. Discharge the capacitor before probing.

Wire / Cable Resistance

R = ρ × L / A. Copper ρ ≈ 0.0175 Ω·mm²/m at 20 °C.
Ω·mm²/m
m
mm²
Resistance R
Copper rises ~0.4 %/°C. For fine wire always check the AWG table.

Digital Multimeter Accuracy

Spec error band ≈ ±(reading × acc% + resolution × counts).
%
± error
Lower bound
Upper bound
Look up the range spec such as 0.5% + 2. Resolution is the value of the last digit.

Rise Time ↔ Bandwidth

For a single-pole (RC-limited) response, tr ≈ 0.35 / BW. Enter either value; the other updates.
s
Hz
Resulting rise time
Required bandwidth
The 0.35 constant assumes a single-pole response; Gaussian systems use ≈0.44. To see a true edge you need roughly 3–5× the signal bandwidth in the measurement system. The probe itself adds bandwidth limits — a ×10 probe with the correct loading extends them.

dBm, Watt & Volt Conversion

P(dBm) = 10·log10(P / 1 mW), referenced to 50 Ω (or any chosen impedance Z). Enter power or voltage; the other values follow.
W
V
Ω
Level (dBm)
Equivalent power
Equivalent voltage
dBm is a power ratio to 1 mW, so it depends on impedance for a given voltage. 0 dBm = 1 mW, and in 50 Ω that is ≈0.223 Vrms. Choose the impedance that matches your test (50 Ω RF, 75 Ω video, 600 Ω audio).

Kelvin Four-Wire Resistance

Force a known current I through the part, then sense the voltage V across it with separate leads that carry no current: R = V / I. Lead resistance is excluded, unlike 2-wire.
A
V
Ω
4-wire resistance R
2-wire apparent R
Lead error
Four-wire sensing matters below ~1 Ω where lead and contact resistance would dominate a 2-wire measurement. Keep force and sense leads bundled and short; a stable, clean current source is essential for accurate low-resistance readings.

Series RLC Resonance

A series LCR tank resonates at f0 = 1/(2π√(LC)). At f0 the impedance is a minimum and the current is maximum; quality factor Q = (1/R)·√(L/C) sets the bandwidth BW = f0/Q.
µH
nF
Ω
Resonant freq f0
Quality factor Q
Bandwidth BW
Real inductors add parasitic capacitance and a resistance that raises losses, so measured f0 and Q differ from the ideal numbers. To tune a resonant filter, sweep f0 with a generator and scope and adjust L or C.

Scope Probe Loading

A passive probe presents Rprobe ∥ Cprobe across the circuit. The node driving the probe must source the probe current, so V = Vs · Zprobe/(Zprobe+Zs), a loading loss that grows as Cp shunts to ground.
Ω
pF
MHz
Probe |Z|
Loaded V/V_in
Loss (dB)
The probes impedance drops as Cp shunts to ground at high frequency. Rms solutions: use a ×10/×100 probe (higher Rp, lower Cs), an active probe, or a proper 50 Ω terminated feed-through for RF nodes, and keep the ground lead short.

Cascaded Rise Time

Series of rise-time-limiting stages combine in quadrature: tr_total = √(tr1² + tr2² + …). The system bandwidth then follows BW ≈ 0.35/tr_total.
ns
ns
ns
Total rise time
Effective bandwidth
The slowest stage never fully hides the others — three equal stages still slow the edge by √3. To see a true edge, pick scope bandwidth ≈ 5× the signal bandwidth; you are measuring the cascade, not just the signal.

📊 Test Diagrams

Rise-time/bandwidth limit and Kelvin four-wire sensing.

RISE TIME · BANDWIDTH ideal edge bandwidth-limited tr ≈ 0.35/BW slower edge → less BW

Rise time & bandwidthA bandwidth-limited measurement rounds the edge — the displayed rise time is set by the scope/probe system, not the signal itself. To reproduce the true edge, the system bandwidth must comfortably exceed the signal content.

KELVIN 4-WIRE SENSING DUT I force I V+ sense (no current) V− sense R = V_sense / I_force → lead drops excluded

Kelvin 4-wire sensingForce current flows only in the outer (force) leads; the inner (sense) leads carry negligible current, so they see the true voltage across the device, not the drop in the leads. This cancels lead and contact resistance.

PROBE LOADING Zs Vs GND Rp Cp DUT node to scope V = Vs · |Zprobe|· (|Zprobe|+Zs)⁻¹ → falls with f ×10 = higher Rp, lower Cp

Probe loadingThe devices node must drive the parallel Rp∥Cp of the probe. At low frequency the 10 MΩ resistance barely loads; at high frequency Cp shunts the signal, dividing the voltage the scope sees.

SERIES RESONANCE · |Z| |Z| f min at f0 BW = f0/Q Xl = Xc at f0=1/2π√(LC) · low R → high Q, narrow BW

Series resonanceBelow resonance the series impedance is capacitive and falls toward a minimum at f0, where only R remains; above it the impedance rises as inductive. The dip is wider (lower Q) as R grows.

DMM ACCURACY · %RDG + CNTS reading +err −err err = %rdg · reading + counts · resolution → band widens as reading grows

DMM tolerance bandA multimeter states accuracy as a percent of reading plus a fixed number of counts (resolution steps). Both add into a band around the displayed value; on small, near-dead-zero readings the counts term dominates, which is why range and resolution choices matter.

dBm · POWER ↔ VOLTAGE 0 dBm 1 mW V = √(P·Z) 0 dBm in 50Ω → 0.224 Vrms 0 dBm in 600Ω → 0.775 Vrms dBm = power relative to 1 mW · moving between watts and volts needs the impedance Z

dBm reference0 dBm means 1 mW. Across an impedance Z it equals √(Z·1 mW) volts — 0.224 Vrms into 50 Ω, 0.775 Vrms into 600 Ω. To convert power to voltage (or back) you must state Z; +3 dB doubles power, −3 dB halves it.

SAMPLING · NYQUIST & ALIASING fs > 2·f (OK) fs < 2·f (ALIAS) gray = real high-f · dots sampled on it · alias appears as the wrong low f traces the true sine when sampling fast enough

Sampling & aliasingIf you sample slower than twice the signal frequency (the Nyquist rate), the samples still fall on the true wave but connect into a different, lower-frequency wave — the alias. It is indistinguishable from a real signal, so always sample at or above fs ≥ 2·f and put an anti-alias filter before the sampler.

DIFFERENTIAL MEASURE & CMRR + V+ V− Vsig Vcm (both) out signal appears between V+ and V−; equal noise cancels CMRR(dB) = 20·log|Avd/Avcm| → better is higher

Differential & CMRRA differential meter subtracts its two inputs, so a common-mode signal (mains hum, ground noise) that is identical on V+ and V− cancels, leaving only the difference to amplify. The rejection quality is the common-mode rejection ratio CMRR = |Avd/Avcm|; the higher it is, the less an interfering signal corrupts a small accurate measurement.

INPUT OFFSET VOLTAGE · VOS ideal zero output= Vos·gain (not zero) drift vs Temp shorted input → output = gain × Vos random per unit, grows with temperature

Input offset voltage · VosAn ideal amplifier left with both inputs shorted would read zero, but a real one reads a small residual, the input offset voltage. That offset appears at the output multiplied by the closed-loop gain, so a high-gain stage turns even a few millivolts into a large error at the output. Measuring it is simple: tie the inputs together at a reference, read the output, and divide by the gain. Because the offset is a distribution across units rather than a single number, a part-to-part scatter, plus a drift with temperature and with time, are the real story. Vos matters more where the stages run at high gain or where a DC error at the front cannot be calibrated away.

SLEW RATE · DV/DT in out dv/dt full-scale step large-signal slew, not small-signal BW limited dv/dt rounds square edges

Slew rate · dv/dtBandwidth describes a small signal, but a full-scale step calls on an entirely different limit, the slew rate, the maximum rate at which the output voltage can change. When the demanded change is faster, the output no longer follows the input instantly and instead ramps at that clamped dv/dt, rounding the corners of a square wave and distorting the signal. Slew rate is measured by applying a large, fast step and reading the slope of the output ramp. The two are not the same number: small-signal bandwidth and large-signal slew rate both matter, because a signal whose edge needs more than the available slew gets its edges slowed and a sine approaching the full scale starts to distort near its zero crossings.

GAIN ERROR · TRANSFER ACCURACY out in slope > 1 = gain error ideal unity unit slope ideal vs measured slope

Gain accuracy · gain errorEven after an offset is zeroed, a channel may still deliver the wrong answer because its transfer slope is not exactly one: a gain error makes the output rise faster or slower than it should, so a correct reading is only produced at one point and drifts with amplitude. It is characterized by driving two or more known levels, reading the output, and comparing the slope of the fitted line with the ideal. The gain error reflects the ratio accuracy of the resistors that set the scaling and, in a quantizer, the exactness of the converter reference; it can usually be removed by a two-point calibration. What stays behind is the curvature of the transfer characteristic and the noise on each measurement, so the residual error after calibration is never zero, and both the linearity and the stability over temperature of the references bound how accurate the corrected channel can become.

OVERLOAD RECOVERY TIME upper lin overload recovery back to linear time to leave saturation and read true again

Overload recovery timeAn amplifier or converter that is driven briefly beyond its range will clip, and when the offending signal is removed it does not instantly return to normal: internal nodes that saturated take time to discharge back into the linear regime. The overload recovery time is the interval from the moment the input returns to a legal level until the output settles back inside its linear band and can again be trusted. Saturation also charges compensating capacitances and drives output stages to their rails, so the recovery can take far longer than the normal settling time, and a measurement taken during that window reads wrong. It matters wherever short large spikes coexist with a real signal to measure, because a burst of gain or EMI that overloads the front end masks the very reading that follows it, and the only guard is to keep the stage from saturating at all or to blank acquisitions through the recovery interval.

FREQUENCY COUNTER · GATE TIME in gate A · short gate B · long 6 counts more counts Tgate f = N / Tgate ±1 count → rel. error = 1/(f·Tgate): 1s ⇒ 1Hz, 1ms ⇒ 1kHz low f → reciprocal period mode (count timebase between 2 edges)

Counter gate & resolutionA frequency counter counts input cycles inside a fixed gate window and divides by the gate time. The count is ±1 cycle off by rounding, so the relative error is 1/(f·Tgate): a 1 s gate resolves 1 Hz at any frequency, a 1 ms gate only 1 kHz. For low frequencies use the reciprocal period mode — count the timebase ticks between two edges — which keeps resolution fine and fast.

SCOPE TRIGGER · LEVEL + HYSTERESIS level hyst band rising cross of level → trigger hysteresis swallows ripple so noise can't re-trigger set level just above noise floor → stable, single sweep

Trigger level & hysteresisAn edge trigger fires when the signal crosses the set level in the chosen direction, then the scope waits until the next arm. Hysteresis widens the band around the level so small noise ripples near the crossing cannot re-trigger or double-trigger the sweep. Set the level just past the noise floor onto the clean waveform, and pick a hysteresis slider wide enough to swallow the ripple but not the signal edge.

AVERAGING · √N NOISE REDUCTION mean noisy samples: σ each sample = true value + random noise average N avg σ_avg = σ/√N — N=100 ⇒ ÷10; true value unchanged random noise only & DC constant; a real trend gets smeared

Averaging & √N noiseAveraging N repeated samples of a noisy DC level keeps the true value but shrinks the random noise by √N — averaging 100 points cuts the standard deviation tenfold. It only helps if the noise is random and the signal is constant; a small real trend gets smeared out, and if you average less than one sample per source period you fold source ripple in instead of removing it.

VOLTMETER INPUT LOADING Vs source Rs A · Vm V Rm Vm = Vs·Rm/(Rs+Rm) — error whenever Rm is not ≫ Rs high-Z source → use high-Z input / buffer / 4-wire

Meter input loadingA voltmeter sinks a tiny current through its input resistance Rm, and that Rm sits in series with the source resistance Rs as a divider: Vm = Vs·Rm/(Rs+Rm). The reading drops below Vs whenever Rm is not much larger than Rs — on a high-impedance source (e.g. MΩ sensors) even a 10 MΩ meter reads low, so use high-Z inputs, buffer, or 4-wire for really high Rs.

TIME BASE · SAMPLE RATE true fast signal samples under-sampled → false "alias" screen span = x/div · Ndiv; record N = span · fs

Time base & samplingThe scope turns the horizontal axis into time via the time base: the full width is x/div times the number of divisions, and the ADC samples that window at the sample rate fs, so the record length is N = span·fs samples. To represent a fast edge faithfully the sample clock must be at or above twice the highest frequency present (Nyquist); when fs is too low, the points the scope actually has join into a different, slower wave — an alias you cannot tell apart from a real signal. A long record (more depth) lets you keep a high fs over a longer window at once.

SCOPE ACQUISITION CHAIN Probe 10×/BW Amp V/div ADC fs · N-bit Memory Mpts depth −3 dB probed signal → gain → sampler → N samples stored stored points fs ≥ 2·fmax (Nyquist) — adopt BW ≥ fastest component; deep record ⇒ long span at high fs

Scope acquisition chainSignal flows probe → attenuator/amplifier → ADC → memory. The probe sets the loading and its −3 dB bandwidth caps what reaches the front end; the amplifier sets volts-per-division gain; the ADC samples at fs with N-bit resolution; the record memory holds M samples of a single sweep. The displayed trace is only as honest as the weakest stage: bandwidth must cover the fastest component, the sample rate must meet Nyquist fs ≥ 2·f (or an alias appears), and enough record depth lets a fast sample rate run over a long time window without giving up one for the other.

TURBIDITY · PHOTODIODE + DMM LED/IR sample cell scattered particles PD Iph Iph ∝ scattered light ∝ turbidity (NTU) TIA or current mode → Vout = Iph·Rf; DMM reads mV calibrate against formazin/FNU standards; angle & wavelength matter

Turbidity & light measurementA turbidity meter shines a known LED/IR beam through the sample; particles scatter some of it sideways, and a photodiode looks at that scattered (or transmitted) light. The photodiode output is a tiny current that a transimpedance amplifier or the meter in current/resistance mode turns into a readable voltage, so a DMM reading in mV or the resulting ohms tracks the NTU. Because scattered power depends on both angle and wavelength, calibrate against formazin/FNU standards and keep the geometry fixed for the reading to be meaningful.

TRIGGER & POST-TRIGGER SCAN trigger point pre-trigger post-trigger trigger arms capture; a pre-trigger buffer keeps what was there before glitch/wrongness often lies BEFORE the event you notice

Trigger & post-trigger scanInstead of chasing a waveform blindly, a scope keeps a continuous ring buffer and waits for the trigger condition (a level crossing, an edge, or a pattern) before freezing a sweep. The samples stored to the left of the trigger are pre-trigger data; those to the right are post-trigger. Since a fault or glitch often lives before the event you first notice, showing the pre-trigger window with a negative time offset is what turns the scope from a voltage viewer into a fault finder — and for very slow signals, roll/scan mode lets the whole sweep drift across the screen without ever re-arming the trigger.

TIMEBASE ACCURACY · CRYSTAL Xtal OSC f0 ppm ÷N timebase gate Tx? every gate between samples inherits the crystal tolerance (±ppm) ΔT/T_rel ≈ crystal ppm → drift on long measurements ideal counts drift with crystal ppm — 20 ppm = 20 s off per 1e6 s

Timebase accuracy (crystal)Every time measurement on a scope or counter, from the sample clock to the gate that opens for one period, is derived from a reference oscillator — almost always a quartz crystal. Whatever ppm error that crystal carries (from ageing, temperature or initial trimmability) transfers straight into the measured time, so a ±20 ppm crystal makes a 1,000,000 s measurement drift by as much as 20 s. For high-resolution timing you either trim the crystal, oven it (OCXO/TCXO), or discipline it to an atomic or GPS reference; the cheaper catch-all is just to keep the reference this side of the accuracy you actually need.

TRIGGER SOURCE SELECT CH1/CH2 on waveform EXT trig separate clock LINE mains sync driver clock / decision gate trigger the source that defines the interesting edge LT = lowest noise/nearest to the event that must be stable

Trigger source selectionThe trigger decides when the scope begins a sweep, so the source matters more than the level: CH1/CH2 trigger on the waveform itself and are handy but jitter with every bit of noise on it; an EXT trigger input samples a separate clock or chip-select so the capture lines up with the logic/clock edge regardless of how the signal under test looks; LINE triggers off the mains so you get one stable sweep per 50/60 Hz period for ripple or noise studies. Pick whichever source is closest to — and owns — the edge that has to stay still in the picture.

SETUP-HOLD · METASTABILITY FF clk edge setup hold error if edge lands inside aperture metastable Q violating the window, the output lingers, then resolves to either state at an unknown time two sync stages trade latency for MTBF

Setup / hold · metastabilityA flip-flop promises to copy its data input, but only if that input is stable for an instant around the clock edge: for a setup time before the edge and a hold time after it, the two halves of the latch together form a window, the aperture, during which the data simply must not change. Drive a transition into that window and the latch finds itself reading a level that is half one thing and half the other, so it hovers, a metastable output that is neither cleanly high nor low, then settles toward one side after an unpredictable delay. The danger is not the flip-flop alone but the system behind it: downstream logic assumes settled levels, so a metastable state that is still resolving when it is sampled turns into a wild guess, which is why async inputs are funneled through a chain of synchronizer stages, each giving the first stage one more clock period to resolve, a trade of a little latency against a much longer mean time between failures.

TIMEKEEPING DRIFT err days aging slope temp wiggle ideal 0 err accumulated error vs an absolute reference ppm drift = initial offset + temp + aging

Timekeeping driftA clock does not run with a perfect rate; it drifts, so timekeeping accuracy is measured as how far the accumulated time pulls away from a precise reference over days or weeks. Loose error in a counter driven by a cheap oscillator grows from three pieces: an initial offset that is a fixed rate error present from the start, a temperature coefficient that walks the rate as the oscillator warms and cools, and aging, the slow creep of the crystal and its load over months as it settles toward a resting frequency. Because they differ, they are separated on the long plot: the flat offset is measured against the ideal line, the wiggle around the slope tracks the thermal swings, and the steady rising slope is the aging rate in parts per million per year. Once separated, the pieces tell what to correct, trim the offset, calibrate for temperature, and know the aging uncertainty the clock carries, and that is why drift is reported in seconds per day or ppm rather than a single absolute error.

EYE DIAGRAM · HEIGHT / WIDTH / MASK 1 0 mask H eye width bathtub/BER→clean window height = noise margin ; width = timing margin stay clear of the 3/4 mask; a choked eye is what EQ reopens

Eye diagramTrigger the scope on a clock and overlay many random bits onto the same bit period, and the transitions paint an eye. The vertical separation is the noise margin, the eye height; the horizontal opening before the transitions cross is the timing margin, the eye width, driven down by jitter spread and by intersymbol interference that drags past bits into the current one. Standards press a mask over the centre of the eye (commonly the 3/4-opening mask) and the waveform must stay clear of it; slicing the eye at a threshold and plotting bit-error rate against sample position gives a bathtub curve whose flat bottom is the clean sampling window, and the Q-factor measures the height in units of noise. A high, wide eye with margin all around the mask says the link is healthy; a choked, smeared or barely-open eye points to loss, reflection, crosstalk or pattern — exactly the case an equalizer reopens.

INTER-SYMBOL INTERFERENCE · ISI eye height crossing eye width previous bits + reflections smear into symbol closes the eye; CTLE / DFE re-open it

Inter-symbol interference · ISIA symbol does not travel alone: the tail of the bits before it, spread by the pulse response of the channel, still leaks into the moment at which the current bit should be sampled, and reflected energy from impedance discontinuities joins the same leak. That leak is inter-symbol interference, and its signature is a closing eye, a shrinking vertical opening where the level is decided and a blurred region where the transition crosses. Because the interference is deterministic, tied to the exact bit history and the channel, it cannot be averaged away by more acquisitions, it has to be undone: a linear equalizer shapes the bandwidth to lift the high-frequency content the channel cut, and a decision-feedback equalizer subtracts the reconstructed tail of earlier bits from the current sample. The residual ISI after equalization is what the link must live with, which is why it is measured as the reduction in the eye that would otherwise be clean.

EYE MASK TEST · PASS/FAIL in mask = err mask from the standard; a hit inside = fail violations / total UI estimate BER early

Eye mask test · pass/failAn open eye is a promise the link can be read, but judge that opening by eye alone is subjective, so a mask test overlays a rigid forbidden region, drawn from the signalling standard, around the centre of the eye and simply counts how often a sample falls inside it. Any waveform that crosses into the mask, at the crossing it is the timing violation, at the centre it is a level violation, is a strike against the symbol, and the number of strikes over the total unit intervals measured gives an early, quantitative estimate of the bit error ratio without running a long BER test. The mask is the contract between the driver and the receiver, so it is defined on the normalized eye, in units of the unit interval and the signalling swing, which makes results comparable across parts and pins even when the absolute speed and voltage differ. A margin check, how far the cleanest amplitude and phase stay clear of the mask edges, is the practical gate before a design ships.

EQUALIZATION · CTLE / DFE closed eye EQ CTLE FFE DFE open noise↓ jitter↓ BER ↓↓↓ CTLE peaks lost HF; FFE pre-emphasizes; DFE subtracts post-cursor ISI with no added noise reopens an eye from barely-open to wide & high cost: CTLE/FFE also boost noise; DFE propagates errors

Equalization: CTLE & DFELoss and reflections close the eye at the far end of a long channel, and an equalizer reopens it. A continuous-time linear equalizer (CTLE) adds peaking in the receiver to pump up the frequencies the cable already bled, a feed-forward equalizer (FFE) at the transmitter pre-emphasizes the symbols the other way, and a decision-feedback equalizer (DFE) subtracts the remembered post-cursor ISI from each detected bit with zero extra noise. Put together they turn a barely-open, low eye into a wide, high one and drive the BER down orders of magnitude. The trade is that CTLE and FFE also amplify noise and DFE propagates decision errors, so the best choice depends on the channel length and the eye budget.

1:10 SCOPE PROBE COMPENSATION ~ cal sq tip 9 MΩ C_trim SCOPE INPUT 1 MΩ ∥ 20 pF 1M 20p set C_trim so R·C balances: flat square = best high-frequency flatness under good over

1:10 probe compensationA 10× probe does not just attenuate — it holds a flat response only because its tip components are balanced against the scope input. The series 9 MΩ resistor sits beside a small trimmer capacitor in parallel, and the two together divide against the scope's own 1 MΩ and ~20 pF. For flatness you want the probe's R·C time constant to equal the scope's; if it does, every frequency is attenuated by exactly 10 and a square wave arrives square. Turn the trimmer while probing the calibration terminal: a rounded, sloped or spiky square says the capacitor is too small, just right, or too large, and the probe sine response in dB only gets worse the further you are from the flat point.

FFT SPECTRAL LEAKAGE · WINDOWING cut window holds 1.7 cycles — tone lands between bins rect → leakage neighbour bins steal energy Hann → clean energy stays in one bin

FFT spectral leakageAn FFT silently assumes that the captured window repeats forever. If the window does not hold a whole number of cycles, the copied waveform snaps at the ends, the discontinuity does not belong to the signal, and its energy splashes into every neighbouring frequency bin — the tone looks wider and smaller than it really is. This is leakage. Multiplying the sample block by a smooth window such as Hann tapers the ends to zero, making the repeat continuous, and the same tone collapses back into one clean bin (at the cost of a slightly wider main lobe). Pick a flat-top window when you need accurate amplitude rather than the narrowest peak, or record enough samples that your highest frequency still finishes many whole cycles.

JITTER · TIE HISTOGRAM ideal rec'd TIE edge wanders → early or late vs ideal grid −1σ +1σ σ = RMS jitter p-p (peak–peak)

Jitter TIE histogramEach recovered clock edge is compared with where an ideal, perfectly regular edge would sit, and the difference is the timing-interval error (TIE). Gather thousands of edges and the errors form a histogram whose spread tells you how real the clock really is. The standard deviation of that distribution is the RMS jitter, and the distance from the earliest to the latest edge is the peak-to-peak jitter — the number that matters for set-up/hold margins, because a single huge wander can flip a flip-flop. Total jitter is usually quoted at a bit-error-rate edge, roughly p–p plus several σ of the remaining tail, since deep tails still cause the occasional late data bit or early clock edge on a real link.

AC METER READING · RMS vs AVERAGE 0 V Vp Vrms=Vp/√2 Vpp sine: Vrms=0.707·Vp, rectified average=0.637·Vp → 1.11 ratio true-RMS squares & averages (correct on any shape) averaging meters scale by 1.11 — wrong on square, noise, chopped read the front label: TRMS vs AVG decides which you are buying

RMS vs average readingAn AC meter must decide how to boil a squiggly voltage down to a number, and the two common choices disagree on anything that is not a clean sine. True-RMS means the meter actually squares the instantaneous samples, averages the squares, and takes the square root: Vrms is the DC value that heats a resistor exactly as much as the AC does, and it is correct for sine, square, noise and chopped waveforms alike. An averaging-responding meter instead measures the average of the fully-rectified wave and then multiplies by 1.11 — a "form factor" that is only true for a sine (Vrms≈1.11·Vavg). On a symmetrical square or a pulsed/triac-chopped signal it under-reads by up to ~10% or more, which is exactly why the Mains label TRMS/DMM distinction matters before you trust a voltage figure.

T-ATTENUATOR PAD · dB FIXTURE Pin R1 Rs R2 Pout both ports see Z0 → no reflections into DUT or meter dB = 20·log10(Vout/Vin); stack pads to add decibels e.g. a 10 dB 50 Ω pad: R1=R2≈96 Ω, Rs≈71 Ω

T-pad attenuatorWhen you need to trim a signal level without disturbing the transmission line, a resistive pad does it with only three resistors. A T-pad places one series resistor in each leg and one shunt resistor between them; if the three values are solved for the system impedance it is matched in both directions, so neither your source nor your meter sees a reflection — ideal when you want to drive a scope-through-50Ω or an antenna input at exactly the right level. The drop is set by the pad design and is quoted in decibels (20·log10 of the voltage ratio), and because pads are reciprocal you can stack them and simply add the dB figures. Typical design values for a 10 dB 50 Ω pad are about 96 Ω series and 71 Ω shunt; many RF instruments embed such pads so their inputs accept up to a safe, calibrated power.

ALIASING · NYQUIST RATE real 5 kHz sampled 1 kHz alias ghost sample dots sample rate must be > 2× the highest signal frequency too few samples fold the frequency down into an impostor wave anti-alias filter in front forbids anything above f_Nyquist

Aliasing & NyquistA sampler only knows the values it took at its ticks — everything between them is filled in by assumption. If an input tone is above half the sample rate (the Nyquist frequency), those dots get taken too rarely to see the real wiggle, and the reconstructed wave appears at a lower frequency that never existed on the input: an alias. This is why the sample rate must exceed 2× the highest frequency you actually care about, and why every real scope and ADC places an analog low-pass "anti-alias" filter before the sampler to physically block everything above that limit — otherwise noise and out-of-band tones fold back down and masquerade as real in-band signals. In short, once a frequency aliases, no amount of DSP can tell it apart from the genuine signal it now impersonates.

CREST FACTOR · PEAK/RMS sine 1.414 square 1.0 spike ~10 peak Vpp crest factor = Vpeak / Vrms; 1.414 is a pure sine square=1.0; noise, audio, AC-line spikes → higher a speaker/metre must survive crest or the peaks clip & distort

Crest factorCrest factor is the ratio of a signal's peak amplitude to its RMS value — in plain words, how much taller the peaks are than the level that does the heating. A clean sine sits at exactly CF = √2 ≈ 1.414; a symmetric square wave, whose peak equals its RMS, is 1.0; real speech, noise and power-line surges climb to 3 or far higher. The number matters in two places. On the generation side, an amplifier or meter rated only for sine crest will let musical or impulsive peaks clip and flatten before the RMS even reaches its limit. On the measurement side, a true-RMS meter must keep enough amplifier headroom to sample those tall peaks without clipping, so its crest-factor rating (often 3, sometimes 6+) tells you how peaky a waveform it can still measure accurately.

RISE TIME · 0.35 / BANDWIDTH tr ≈ 0.35 / B 90 % 10 % input ~2 ns through BW band any finite bandwidth rounds every edge — the 10-90% rise tr ≈ 0.35 / B 3.5 ns at 100 MHz, 350 ps at 1 GHz; cascaded stages add in quadrature probe & scope ~3-5x faster than the signal, or the measured edge reads soft

Rise time & bandwidthNo oscilloscope, probe or amplifier can pass an infinitely fast edge: the bandwidth of the measurement system acts as a low-pass filter and slows every transition down. For a single-stage system the 10-90% rise time and the 3 dB bandwidth are joined by the classic rule of thumb t_r ≈ 0.35/B — 3.5 ns at 100 MHz, 350 ps at 1 GHz. When several stages cascade, their rise times combine in quadrature (t_total = sqrt(t1²+t2²+...)), so the slowest stages dominate and you only see the biggest one. To trust a fast measurement, the probe and scope should be at least 3 to 5 times faster than the signal; otherwise your pulses, eye diagrams and digital edges all come out slower and rounder than they really are.

TOTAL HARMONIC DISTORTION · THD f1 ref actual f1 2f1 3f1 4f1 H1 THD = √ΣHk² / H1 harmonics are faint copies at integer× the fundamental; THD = √ΣHk² / H1 a fine audio amp is ~0.01%; a cheap inverter or motor VFD is a few percent harmonics raise RMS current, overheat chokes & transformer cores, trip meters

Total harmonic distortionEven a "linear" stage adds faint copies of the input tone at whole-number multiples of the fundamental, called harmonics. Total harmonic distortion (THD) compares the power carried by all those harmonics with the power of the fundamental — THD = sqrt(H2²+H3²+...)/H1, usually reported as a percentage. A good audio amplifier can sit around 0.001-0.01% and climbs sharply near clipping; a motor drive or a cheap inverter might put out a few percent. Harmonics matter beyond sound quality: they raise RMS current, overheat chokes and transformer cores, disturb other loads and trip metering. Measure THD with a spectrum analyser or a distortion analyser, using sine excitation at a defined level and frequency.

LISSAJOUS · PHASE · X-Y CH1 sin ωt → X CH2 sin(ωt+φ) → Y φ = 0° → diagonal line φ = 90° → circle else → tilted ellipse same f, phase difference X-Y display sin φ = b/a same frequency, different phase draws a tilted ellipse 0° is a line, 90° is a circle, in between read sin φ = b/a dual-trace scope in X-Y mode shows two related signals

Lissajous figure and phaseA Lissajous figure is the shape traced on the screen when a scope displays one sine on the X axis and another sine on the Y axis (X-Y mode) at the same time. If the two tones have the same frequency and are exactly in phase, you see a diagonal line; at 90° apart you get a perfect circle; between those extremes you get a tilted ellipse. The outline of that ellipse encodes the phase angle — measure the minor axis b and the major extent a, and the phase follows from sin φ = b/a. Lissajous patterns let you measure phase shift without fancy instruments, and when the frequency ratio is not 1:1 they fold into stable looping figures whose shape reveals the exact ratio, so they also become a quick way to check frequency and alignment.

NOISE FLOOR · SNR 0 freq noise floor signal SNR = signal − floor [dB] spur the peak is the signal, the flat band is the thermal noise it sets on SNR is the vertical gap in dB — 60+ dB is clean, under 40 dB is noisy a narrower RBW lowers the floor; dBm scales make gains and losses add up

Noise floor and SNREvery real signal sits on a bed of thermal noise that the measurement instrument itself contributes. A spectrum analyser turns this into a noise floor — a low, uneven band that runs across the bottom of the display; anything that rises clearly above that band is a genuine signal. The signal-to-noise ratio (SNR) is the vertical gap between the peak and the floor, expressed in decibels: 60 dB and above is a clean, strong signal, while below about 40 dB the carrier starts to fight the noise. The floor is never flat and never zero — it depends on the resolution bandwidth (RBW), so a narrower RBW lowers the floor and lets faint signals appear, at the cost of slower sweeps.

OVERSHOOT · RINGING 0% 100% = final ideal overshoot first peak ringing + settle a lightly-damped network shoots past the target and rings down overshoot is the excess above 100%; ringing is the damped wobble a series resistor or snubber adds damping and tames the peak

Overshoot and ringingA step that is meant to sit cleanly at a new level often overshoots and rings first: the output shoots past the target, bounces back below it, and the swings decay until it settles. A lightly damped system — a probe lead, a clock line, a switched regulator loop — overshoots because it has a little inductance and capacitance that trade energy back and forth; the speed of the edge sets how far it overshoots, while resistance provides the damping that lets it settle. On the scope, overshoot is the excess above the final level and ringing is the damped oscillation; a 50 Ω series resistor, a snubber, or lower-inductance routing damps it. Excessive overshoot pushes a driver into saturation, a receiver past its absolute maximum, and an ADC into clipping.

FREQUENCY RESPONSE · BODE +26 0 −30 f (log) −3 dB · fc G0 passband −20 dB/dec bandwidth fc gain is flat in the passband, then rolls off 20 dB per decade the −3 dB point is the bandwidth: half power of the midband swept sine or FFT + noise source reveals filter and loop response

Frequency response (Bode plot)A Bode plot shows how a network's gain and phase behave across frequency, with gain plotted in decibels against a logarithmic frequency axis. In the passband the gain is flat; past a corner frequency it starts to fall — for a simple dominant-pole response by 20 dB per decade, reaching −3 dB at the pole itself. That −3 dB point is the network's bandwidth, where the delivered power is half (−3 dB ≈ half power) of the midband value. Reading a Bode plot tells you whether a filter, amplifier or feedback loop is stable, what its cutoff is, and how much attenuation or peaking it has away from the corner — and it is the tool that exposes crossover in a control loop. Measure it with a swept sine (gain and phase) or an FFT and a noise source.

LOOP GAIN · GAIN-PHASE INJECTION break tip inject sine probe A (in) probe B (out) dB 0 dB crossover T(s) = gain·phase around loop → crossover + phase margin isolated 1:1 transformer, high-Z probes, low-value tip

Loop gain / gain-phase injectionTo measure loop gain you cannot simply probe the output, because that sees the closed-loop response. Instead, break the loop at a low-impedance node and insert a small resistor, then inject a swept sine from an isolated source through it. Two high-impedance probes measure the voltage before and after the break, and their ratio is the loop gain T at that frequency with its own phase. Sweeping frequency reconstructs the Bode plot of the open loop, from which the 0 dB crossover frequency and the phase margin are read. The isolation transformer and low-value tip keep the injection from loading the loop, and injecting at a point that is truly inside the loop is what makes the measurement valid.

CONDUCTED EMI · LISN + SPECTRUM supply LISN DUT 50 ohm CISPR limit emission stays under freq → dB peak above line = fail

Conducted EMI · LISNConducted emissions travel out of a product on its power cord, so they are measured against a defined line impedance. A line impedance stabilization network, the LISN, sits between the supply and the device and presents a repeatable 50 ohm impedance to the noise, both on the measurement port and on the line side. A spectrum analyzer or receiver on the LISN port shows the switching harmonics riding on the broadband noise, and the result is compared against the CISPR or equivalent limit line. A peak that crosses the line is a failure; whether the energy is mainly common or differential mode guides the fix, a common-mode choke for the former and a differential Pi filter for the latter.

PULSE WIDTH · DUTY CYCLE t_high t_low T duty = t_high / T duty cycle is the on-time as a fraction of the period, in percent judge the edges at the 50% threshold, not the rounded top counters gate many periods to spread the error and add resolution

Pulse width and duty cyclePulse width is how long a digital signal stays high in one period, and duty cycle is that on-time as a fraction of the whole period, expressed as a percent — 40 % means the signal is high 40 % of the time. You normally judge the edges at the 50 % amplitude threshold, because the flat top and bottom of a real pulse are slow and rounded. Frequency counters estimate these tiny times by counting edges over a very long gated interval and dividing, which spreads the quantisation error over many periods and gives far more resolution than any single-edge reading. Duty cycle sets the output of PWM motor, dimming and switch-mode control, and it is the quickest check that a timing signal is actually symmetric.

PERSISTENCE · INTENSITY GRADING jitter t → A each sweep writes one trace; persistence keeps them all on screen brighter means the signal passed there more often — an intensity grade a jittered edge or rare runt shows up as a faint tail one sweep misses

Persistence display / intensity gradingA repetitive signal is never exactly the same on every sweep — noise and jitter nudge it slightly. A scope with persistence keeps many overlapping sweeps on screen instead of erasing each one, so the brightness of every point reflects how often the waveform actually passed through it: points the signal hits almost every time burn bright, while rare glitches and the slow wander of a noisy edge survive as faint shadow tails. This intensity grading (density mode on digital scopes) turns statistics into an image — you can watch the probability distribution of a rising edge as a thickening line, spot an intermittent runt pulse a single shot would miss, and judge whether an eye diagram is closing. Phosphor-persistence and colour-graded displays are the same idea in different renderings.

GROUND LOOP · HUM SOURCE SCOPE signal i_hum protective earth loop = one-turn aerial B two ground paths between the instruments close a loop aerial the 50/60 Hz field couples a hum current into the shield & ground break it: one ground reference, an isolator, or a differential probe

Ground loop and humA ground loop forms whenever a circuit has two different return paths to earth. The classic bench case: a signal source and a scope each plug into mains, so their third pins tie their chasses to the same protective earth, and a coax also joins their grounds. Those parallel ground paths close a loop that behaves like a one-turn aerial, picking up the 50/60 Hz magnetic field from nearby mains cables and transformers and driving a hum current around it. That current flows along the cable shield and through the reference points, and the volts it drops add mains hum straight onto the signal you are trying to measure. Cure it by using a single ground reference (break one leg), removing the loop with an isolator or a floating or balanced measurement, keeping the enclosed area small, or using a differential probe so the common-mode hum cancels.

DIFFERENTIAL PROBE Va Vb Vcm DIFF PROBE + ΔV Vcm cancels in the stage two high-impedance inputs, differentially subtracted anything equal on both lines — offset, swing, hum — cancels safe and clean on floating, high-side and switching nodes

Differential probeA differential probe measures the voltage between two arbitrary points without tying either side to earth. Two high-impedance inputs each sense one node, and an internal differential amplifier subtracts one from the other, so the scope sees only their difference. Any voltage present identically on both inputs — a floating DC offset, a large common-mode swing, or mains hum that couples to both leads equally — is rejected and never reaches the display. That makes it the right tool for measuring across a high-side resistor, a current-sense shunt, or a switching node that swings far from earth, where a single-ended probe would either mislead you or short the circuit out. At high frequency the two input paths must stay matched so the two attenuators keep step and the rejection holds across the whole bandwidth.

REFLECTION · STANDING-WAVE RATIO Zs incident → ← reflected ZL Vmax Vmin a load that does not equal the line impedance reflects part of the wave incident + reflected sum into a standing wave along the line SWR = Vmax/Vmin ; 1.0 = perfect match, higher = worse

Reflection & VSWRA transmission line carries a wave toward the load, but if the load impedance does not equal the line's characteristic impedance, part of the wave is reflected back toward the source. The incident and reflected waves add along the line into a standing wave whose voltage swells to maxima and falls to near-null minima at fixed positions. The standing-wave ratio (SWR, or VSWR) is the ratio of the highest to the lowest voltage on the line: it is 1.0 for a perfect match and climbs as the mismatch grows (2.0 is a 10 dB return loss, a short or open is infinite). Measuring SWR with a reflectometer, bridge or scalar analyser tells you how much power is being bounced instead of delivered, and it is the quickest single number for tuning an antenna or terminating a cable.

ADC · EFFECTIVE NUMBER OF BITS FS 0 LSB = FS ∕ 2^N ideal 1 LSB step ENOB = (SINAD−1.76)/6.02 SINAD measured in dB real bits always less than N the nominal bit count is just the LSB ladder width — ideal noise + distortion round and shuffle the codes → ENOB below N measure SINAD of a full-scale sine, then ENOB = (SINAD−1.76)/6.02

Effective number of bits (ADC)An N-bit ADC is only N bits on paper. Its LSB spans FS/2^N of the full-scale range, so the finest code width it can ever resolve is one LSB — but real noise, differential non-linearity and distortion always eat into that resolution. The effective number of bits (ENOB) states how many of the nominal bits genuinely survive: ENOB = (SINAD − 1.76)/6.02, where SINAD is the signal-to-noise-and-distortion ratio of a digitized full-scale sine wave, in dB. An 8-bit front end might deliver an ENOB near 7 bits, a high-resolution 16-bit delta-sigma part often reaches 14. It is ENOB — not the datasheet bit count — that tells you the true dynamic range of a measurement, because a wider nominal ladder is worthless if the noise floor already fills the bottom bits.

CALIBRATION · GAIN AND OFFSET ideal measured offset two-point or best-fit line subtract offset & gain error, slope nonlinearity such as INL stays after linear cal

Calibration · gain and offsetA measurement channel rarely ends exactly where it should: a gain error makes the transfer curve slope away from unity and an offset shifts it up or down, both set by the reference, the front end and the converter. Calibration measures known points and removes these two systematic errors. With one point only the offset is corrected; a second point fixes the gain, and more points permit a best-fit-line across the range. The corrected line is computed in firmware and every reading is mapped through it, so offset and gain vanish from the result. Because a linear map cannot remove curvature, the remaining INL and DNL, plus noise, still bound the accuracy, and the calibration itself must be repeated whenever temperature or the reference drift.

DRIFT · TEMPERATURE AND AGING value budget band drift with Temp cycles + long-term aging read over hours/days; deviation vs budget

Drift · temperature and agingA stable-looking output wanders slowly, and that long-time movement is drift. Two causes dominate: temperature, because every reference, resistor and converter has a temperature coefficient that walks the value with heat, and aging, where the same components lumber across months or years. A drift test logs the output, or the derived quantity such as a reference or a calibrated reading, over hours and days while the temperature swings within the operating band, then compared against a stability budget. The scatter with temperature exposes the temperature coefficient and whether a compensation holds, while a slower trend over time reveals aging. Catching drift early matters because it is often smaller than the random noise at first but accumulates past the budget over weeks.

SINAD · EFFECTIVE RESOLUTION dB full-scale tone harm noise floor ENOB = (SINAD - 1.76 dB) / 6.02 one FFT separates signal from noise + distortion

SINAD · effective resolutionA single FFT of a full-scale tone gives the measured signal-to-noise-and-distortion ratio, SINAD. Sine-wave fitting or a coherent FFT separates the fundamental from the noise and the harmonic distortion; combining them yields SINAD, from which the effective number of bits ENOB = (SINAD - 1.76 dB) / 6.02 makes the real resolution of the converter comparable. A window or coherent sampling avoids spectral leakage so the harmonics and the noise floor are read fairly. ENOB is what matters in a system; an ideal N-bit converter reaches SINAD ≈ 6.02N + 1.76 dB, and every missing code, code error, or noisy reference lowers it.

INL / DNL · LINEARITY code ideal DNL = step vs 1 LSB missing code DNL = each step width; INL = accumulated drift missing code → vertical jump; INL bows the curve

INL / DNL linearityA converter output must step evenly across its input range; any deviation is a linearity error. DNL measures how far each code step sits from an ideal 1 LSB, exposing missing or over-wide codes; INL accumulates the DNL across the range and shows the cumulative bowing of the transfer curve. Both are measured by feeding a code-covering ramp or by applying a histogram to a triangle wave, then comparing the code widths against the average. A DNL beyond 1 LSB means codes can be skipped entirely, while a large INL shifts the thresholds enough to compress or stretch parts of the range and distort the signal.

BEAT FREQUENCY MEASUREMENT f1 signal f2 reference sum slow beat envelope two nearby frequencies add: the sum swells and dies slowly beat = |f1 − f2| ; count its slow pulses for a precise tuning stop the beat (~0 Hz) and the reference locks onto the signal

Beat frequency measurementWhen two nearby frequencies mix, their sines add and the brief alignment repeats at the small difference between them. That slow swelling is the beat: count its cycles, or tune a reference until the beat vanishes, and you can pin an unknown frequency to far better precision than a counter gate time ever allows.

TIME-DOMAIN REFLECTOMETRY · TDR G pulse incident reflected A launch t0 fault distance = (v · ΔT)/2 ρ=(ZL−Z0)/(ZL+Z0) +1 open · −1 short · 0 match every impedance change reflects a part of the fast edge back ρ = (ZL−Z0)/(ZL+Z0) : open +1, short −1, matched 0 turn the round trip time into metres with the cable velocity factor locate the fault and verify the termination quality without walking the line

Time domain reflectometry (TDR)A fast edge sent down a cable reflects from every impedance change. The fraction that returns, set by the reflection coefficient ρ = (ZL−Z0)/(ZL+Z0), identifies the termination (+1 open, −1 short, 0 matched), and the round-trip time turns directly into distance — a clean way to locate a fault or verify a cable without touching the line.

SAMPLE & HOLD · APERTURE in sh aperture sample moved here the hold edge is not instant: the switch stays open a few ns aperture error = dv/dt at that instant × aperture time low-aperture S/H must precede a fast, jittery ADC front end

Sample-and-hold aperture timeA sample-and-hold tracks the input through a switch into a hold capacitor, and the hold command should freeze that value instantly. It does not: the switch takes an aperture time to actually open, during which the still-tracked input keeps moving. The longer the aperture and the steeper the signal\'s slope at that moment (dv/dt), the bigger the error between the value ordered and the value captured. Fast converters therefore put a low-aperture S/H in front of the ADC so the digitizer always sees a still, settled voltage.

DE-EMBED · REFERENCE PLANE SCOPE FIXTURE adds delay + loss DUT what we want plane measured = DUT ⊗ fixture insertion loss rises with f measure a known through, then subtract the fixture digitally de-embedding moves the reference plane to the DUT pads without it, fixture length and loss corrupt every S-parameter

Fixture de-embedding / reference planeWhen the scope sees the DUT through a probe, cable or fixture, the fixture adds its own length, delay and insertion loss, so the raw measurement blends the device with the path — it is not the DUT on its own. De-embedding measures a known through-standard first, models that added element and then subtracts it digitally, moving the reference plane back to the DUT pads. On high-frequency boards the fixture\'s loss can otherwise swamp the very S-parameter or eye-diagram you are trying to measure.

IMPEDANCE DISCONTINUITY LOCATION step Z0 stub Z1 > Z0 via Z2 < Z0 Z3 matched load ZL = Z0 reflected steps arrive back at distinct times each step height = mismatch; its time → its distance Z above Z0 reflects positive, Z below Z0 reflects negative a connector, via and stub each echo as its own step in time multiply each arrival time by v/2 to place the fault in millimetres

Transmission line impedance discontinuity locationTo locate an impedance discontinuity, launch a fast step into a transmission line that is otherwise uniform. As long as the local impedance matches Z0 the step passes without reflecting; wherever Z jumps, a portion echoes back as a discrete step whose sign tells whether Z is above or below Z0. The two-way time to each reflected step, multiplied by the propagation velocity and halved, gives the distance to each stub, via, connector or unmatched load along the line.

RISE TIME vs BIT ERROR RATE logic 1 logic 0 threshold noise band crosses → bit flips eye height collapses eye diagram low bandwidth stretches the edge: tr ≈ 0.35/BW the slow slope and the noise band both cross the threshold keep the eye opening above the noise to hold BER near zero

Rise time and bit error rateBandwidth and bit error rate are linked through the rise time of the recovered waveform. A low channel bandwidth stretches every logic edge with tr ≈ 0.35/B, so the bit only just reaches the receiver threshold by the sampling instant; any noise at that moment can push the voltage across and flip the decision. Over many bits the symbol eye closes and errors accumulate, so the eye height versus the noise band at the threshold is what sets the BER.

JITTER HISTOGRAM · RJ vs DJ p–p (bounded, DJ) RJ σ DJ two humps = deterministic offset (bounded) time / UI one Gaussian hump = random (RJ); unbounded tails grow the p–p with time two humps or a smear = deterministic (DJ): crosstalk, EMI, ISI, periodic edge total jitter ≈ DJ + n·σ(RJ) at the BER the link needs the eye budget uses both: the closed heart is deterministic, the blur is random

Jitter histogram: random vs deterministicThe shape of a jitter histogram tells you the source. Purely random jitter is thermal and shot noise, a single Gaussian hump whose unbounded tails keep widening the longer you measure, so peak-to-peak keeps growing with σ. Deterministic jitter is bounded — a second hump, a split or a smear appears from crosstalk, EMI, inter-symbol interference or a periodic edge — and it has a hard peak-to-peak that does not grow with time. Total jitter is then the bounded deterministic width plus n·σ of the random tails, evaluated at the bit-error-rate level the link needs.

DUAL-DIRAC · TOTAL JITTER RJ σ RJ σ DJ TJ(BER) = DJ + n·σ n = Q(BER) — n ≈ 7 at BER → 1e−12 RJ unbounded Gaussian; DJ bounded peak jitter waterfall: TJ grows at lower BER ↑ tails of RJ

Dual-Dirac total jitterRandom jitter is unbounded Gaussian — its tails keep growing with the BER you must meet — while deterministic jitter is bounded by the data pattern and can never exceed a fixed peak. Jitter analysis models the two with the dual-Dirac picture: the random part is a Gaussian of sigma on each side of a deterministic separation DJ, and the jitter at a chosen error rate is the total jitter TJ(BER) = DJ + n·σ, where n is the Q-scale multiplier (about 7 for BER = 1e-12). Plotting TJ against the error-rate scale gives the jitter waterfall, so a budget can be set by reading off the allowed error rate rather than a fixed peak-to-peak that random jitter never really has.

SHIELD TRANSFER IMPEDANCE Zt outer shield coupling length l I1 V2 Zt = V2 / (I1·l) Zt f (log) good shield poor shield Rsh DC apertures / skin push Zt up with f inject I1 on the shield; leakage couples over length l to the core as V2 Zt = V2/(I1·l); lower Zt means a better screen for the same current flat at DC resistance, then rises with skin effect and connector apertures

Shield transfer impedance ZtA shield only protects as well as its transfer impedance. If you inject a current I1 along the outside of the shield over a coupling length l, a fraction leaks to the inner conductor and shows up as an induced voltage V2, and the surface transfer impedance is Zt = V2 / (I1·l) — the lower this is, the better the shield. It stays near the shield’s DC resistance at low frequency, then rises with frequency as skin effect and any apertures (connector gaps, braid weave) couple more; a poor shield starts flat but higher — same physics, more leakage.

GROUP DELAY · τg = −dφ/dω in FILTER τg(f) sloped Δφ shift out 0 τ (ns) freq → flat = linear phase bump ripple ⇒ timing skew constant delay is free — only deviation from flat distorts measure τg via chirp/impulse phase slope, or a VNA τg trace

Group delay / phase distortionGroup delay is the transit time of each frequency component, the slope of the phase response τg = −dφ/dω. A perfectly flat delay across the band is linear phase, so every component arrives together and edges stay crisp; a bump or a rippled wobble in the delay curve bends edges and even smears a square wave, although the amplitude response still looks flat. A constant offset in the delay is harmless because it shifts every bit identically — only the deviation from flat converts to distortion, and ripple converts to a frequency-dependent timing skew. It is measured from phase over frequency, fitted from a broadband chirp, an impulse, or a VNA group-delay trace; a single-sine sweep hides it completely.

GROUP DELAY RIPPLE · TIMING SKEW f → τg flat (free) ripple ⇒ freq-timing skew each carrier lands at a different time → symbol smear measure: fit chirp phase slope, or VNA τg trace judge ripple period vs signal BW, not absolute delay

Group delay ripple & timing skewA flat group delay is linear phase and costs nothing — every spectral component lands at the same time and the eye stays wide. The enemy is ripple: a periodic wobble in the delay curve, coming from connectors, cable resonances or a filter’s passband, which makes each carrier frequency arrive at a slightly different time. For a wideband signal the result is a timing skew between the frequency content that carries the bits, so symbol boundaries smear and the BER climbs even though the average delay is fine. Measure it by fitting the phase slope of a broadband chirp or with the VNA group-delay trace, and judge it by the ripple’s period against the signal bandwidth, not by the absolute delay.

POWER-SUPPLY REJECTION RATIO ripple in LDO / REG Vout inject known ripple measure leak 0 -dB freq → PSRR high at DC rolls off after crossover PSRR = how much a known supply ripple reaches the regulated output, in dB it tracks loop gain: large at DC, weak for wideband noise above crossover

Power-supply rejection ratio (PSRR)Power-supply rejection measures how well a regulator stops rail noise from reaching its output. You inject a known AC ripple on the supply and measure how much survives at the output; PSRR is that attenuation in dB at a given frequency. Because it is set by the loop gain, PSRR is large at DC and rolls off after the regulator&rsquo;s crossover, so fast wideband noise rides through even a well-designed LDO.

HOLD-UP TIME · INPUT DROPOUT Vin input dropout spec band Vout hold-up = within-spec time bulk C energy carries output through dropout

Hold-up timeHold-up time is how long the output keeps running within spec after the input drops out. In the test the input is stepped to a defined low level, typically zero for a short window, and the time the output stays inside its regulation band is measured. The energy that carries the output is stored in the bulk capacitance, so hold-up grows with capacitor size and shrinks as load current or output voltage rises. The measured time is compared against the system requirement, for example keeping memory alive through a line disturbance, and the test also reveals whether the converter restarts cleanly when the input returns.

STATE OF CHARGE · FUEL GAUGE Ibat ∫I dt count OCV on rest gauge SOC % 60% counted charge drifts; OCV re-learns true level

State of charge · fuel gaugeThe state of charge, SOC, is the fraction of usable energy left in the cell. A fuel gauge integrates the current drawn and the current returned, coulomb counting, to keep track, because charge is conserved. Integration drifts with sense error and ignores self-discharge, so the gauge recalibrates against the open-circuit voltage, which is a stable function of SOC after the cell rests. Over temperature and aging the curve shifts and the usable capacity shrinks, so a good gauge learns the cell over time. Without the open-circuit correction the estimate slowly wanders away from the true percentage.

CYCLE LIFE · CAPACITY FADE % cycles 100% new EOL 80% deep DoD hot cycles capacity falls; end of life near 80% of new

Cycle life · capacity fadeEvery charge and discharge cycle wears the cell a little, so capacity measured at full charge fades as cycles accumulate. The fade is far from linear: deeper discharge swings and higher temperatures age the chemistry much faster, while shallow, cool cycling stretches life. A cycle-life test runs the cell through repeated controlled deep charges and discharges while logging capacity every so often, and life is defined where capacity falls to roughly eighty percent of new. Comparing curves across depth of discharge and temperature picks the operating point that gets the most cycles from a given cell.

RIPPLE + NOISE · DETERMINISTIC vs RANDOM ripple ≈ sawtooth at fsw + harmonics noise = broadband, reference + components short sprung ground tip, 20 MHz BW limit AC-coupled small scale: ripple from C ESR/ESL & loop BW

Ripple & noise measurementRipple and noise are two different things on a rail. Ripple is deterministic and periodic, a sawtooth or spike train sitting at the switching frequency and its harmonics, set by the output capacitor’s ESR and ESL and by the control-loop bandwidth. Noise is broadband and random, coming from the reference, the feedback path and component jitter, so it does not repeat from cycle to cycle. To separate them on a scope, probe the rail with a short sprung ground tip instead of a long ground lead, which forms a loop that picks up hum, and engage the 20 MHz bandwidth limit so the wideband switching spikes do not hide the finer detail. Then ripple is read at fsw and its harmonics while noise is measured in the quiet floor between the spikes.

EFFICIENCY · LOSS BREAKDOWN % 100 gain = Pout / Pin · loss = Pin - Pout in/out power meter decompose loss sources

Efficiency · loss breakdownEfficiency is output power divided by input power, so the first step is to meter both accurately in the right domain and at the right frequency, watching for the phase error between voltage and current at high frequencies. The missing power is the total loss, and the useful next step is a loss breakdown, attributing it to switch conduction, switching and gate drive, magnetics, dead-time, and control. Every one of those terms changes differently with input, load, and temperature, so a breakdown localizes where the efficiency is leaking. Comparing the measured total against the sum of the parts also validates the measurement; a large unexplained gap usually means a measurement error or a loss source that was not modeled.

SATURATION CURRENT TEST L IDC rated knee Isat B-H loop slope=μ knee at 10-20% L drop = saturation rating usable peak stays below the knee

Saturation current testAn inductance is not a constant, it holds its rated value only while the core stays below its knee, so the saturation test characterizes the whole operating window. The test walks the DC current up in steps while the inductance is measured, or a pulse drives the coil and the current-ramp slope is watched, and L is logged against current until it collapses at the knee. The current where the inductance has dropped by the rated amount, typically ten to twenty percent, is the saturation current, and that is the real rating: the biggest peak current at which the inductance still keeps its value. The same story shows on a flux-versus-field B-H loop, where the slope is permeability and it flattens as flux runs out, pinning the usable peak below the flat tail. Saturation is not instantly destructive, but a converter that rides into it loses its current-limiting inductance in the very instant the current is highest, so the test fixes the margin between the operating peak and the knee.

THERMAL DERATING P Tj Pmax Tj,max allowed P falls to zero at Tj,max stay under the line, leave margin

Thermal deratingA power rating is not a single number but a curve against temperature: as the junction warms, the safe power shrinks in a straight line toward zero at the maximum junction temperature, so derating is the discipline of staying off the right side of that line. The datasheet derating curve gives the allowed dissipation at each case or junction temperature, and the working rule is to leave margin, because the derating line is drawn from a single-point limit and real life suffers ripple, load steps and aging that eat into it. Thermal margin is therefore a design budget, thermal analysis confirms the hottest point stays under the line at the worst corner, and derating is checked in test by thermals, running the unit hot and watching the junction stay inside the safe zone.

OVERTEMP · THERMAL SHUTDOWN T time trip reset drive on off hysteresis stops it toggling at the edge find trip and reset, cycle it, watch drift

Overtemperature · thermal shutdownA power device is kept safe from overheating by its own thermal shutdown: an on-chip sensor watches the junction and a comparator hangs a threshold, so when the temperature crosses it the drive is pulled off and the part cools. The trip is given hysteresis so the device does not oscillate at the boundary, it shuts a little above the trip and restarts a little below, and the restart is designed to be safe, some parts latching until the power is cycled. Characterizing the protection means finding the real trip and reset points, not the datasheet numbers, with a thermal chamber and a thermocouple or thermal imaging, and matching them against the derating budget so a genuine overtemperature trips before damage and a brief hot spot from load does not shut the system down. The test also exercises cycling, many trips and resets, to prove the protection does not wear or drift.

ESR · IMPEDANCE SWEEP |Z| freq ESR capacitive inductive sweep with an LCR or network analyzer the dip minimum is the ESR

ESR · impedance sweepA capacitor is specified by a value, but the circuit sees an impedance that changes with frequency, and how the ESR behaves through the band is what the sweep measures. An LCR meter or a network analyzer holds the frequency, drives the part and reads the impedance and its real part across a sweep, and the trace shows the three regions: capacitive below resonance, where the reactance falls as the frequency rises, a dip to a minimum at the self-resonant frequency, and inductive above it, where the rising ESL takes over. The minimum of the dip is the ESR. Reading the curve at the operating frequency gives the real ripple voltage and the heating for a switching current, and comparing the whole trace against the datasheet catches a part that barely matches at the printed value but fails where the converter actually needs it.

DISSIPATION FACTOR · Q reactive loss I δ tan δ = loss / reactive Q = 1 / tan δ DF = energy lost per cycle C0G & film ~ tiny high-k ceramic mid electrolytic highest high DF at the ripple freq means self-heating DF, not capacitance, often sets current rating

Dissipation factor · QAn ideal capacitor stores the charge it is given and returns it, a real one loses a little of the stored energy to the dielectric and the metal each cycle, and the fraction of the stored energy lost per cycle is the dissipation factor. Measured as the tangent of the loss angle, the ratio of the resistive to the reactive part at the test frequency, a small DF means a near-ideal, low-loss part, and its inverse is the quality factor. The number is honest about the chemistry: C0G and film sit at a tiny DF, high-k ceramic settles at a larger one, and aluminum electrolytic runs highest, and it drifts with temperature and with frequency. A high dissipation factor at the ripple frequency means the capacitor itself heats up, so in a power loop the DF, not the capacitance, often sets how much current the part can carry and how hot it runs.

NOISE FLOOR amp freq sensitivity = floor + SNR noise floor measured with nothing fed in floor and gain set the smallest resolvable signal

Noise floorAn instrument is only as sensitive as its quietest input, and the noise floor is the residual signal present when nothing is fed in, the combination of quantization noise, thermal noise and the front-end gain that lifts both. The test measures the floor over the band without a signal, usually as a spectrum or a statistical spread, and the floor drawn through the front-end gain sets the smallest signal that can be resolved above it. Sensitivity is then that floor plus the signal-to-noise ratio the receiver needs, so the floor is the real beginning of the measurement budget. Lowering it is front-end work, less input noise, less quantization step and the right gain, and the test confirms the promise by showing the floor, not the datasheet.

DYNAMIC RANGE clip floor span dB small sits on the floor gain up clips the top span from the floor to the compression point AGC swings the full range into the converter

Dynamic rangeA measurement channel must hold the faintest signal and the largest peak in the same frame, and the span between them, from the noise floor up to the point of clipping or compression, is the dynamic range. The bottom is set by the floor, the top by where the gain and the supply run out of headroom, so dynamic range is the ratio of the largest tolerable peak to the smallest resolvable level, usually in decibels. A channel with too little range squeezes the extremes: raise the gain for the small end and the large peaks clip, lower it for the large and the small vanish in the floor. Advanced chains widen it with gain stepping or automatic gain control that swings the full span into the converter, and the test finds the top by raising the level until distortion or compression begins, then reads the span above the floor.

AMPLITUDE · LEVEL ACCURACY reported true level ideal error flatness band gain scales, linearity bends, flatness sweeps calibration multiplies the fixed part away

Amplitude · level accuracyA channel that reports a level is only useful if the number is true, and the amplitude accuracy test measures how closely the reported level matches the known one. A calibrated source drives set amplitudes, the channel reports what it sees, and the difference is logged as a gain error, a fixed ratio that rescales the whole reading, plus a linearity error, a curve that bends the result more in some spans than in others. Sweeping over frequency shows the flatness, how the amplitude response deviates across the band, and sweeping over amplitude reveals where the detector law, rms versus peak, and the converter reference start to drift. The result is the real level-reporting budget of the attenuator, the filter and the detector acting as one, and it is what a calibration multiplies away until only the residual curvature and the noise remain.

ALIASING · FOLD-BACK level freq fs/2 real above fs/2 ghost folds back content above fs/2 mirrors into the band anti-alias turns a fake reading invisible

Aliasing · fold-backSampling copies each input frequency into every Nyquist zone, and a tone above half the sample rate folds back down into the passband, a ghost that the digitizer cannot tell from a genuine low frequency. The aliasing test proves the anti-alias path does its job: a swept tone walks from low to far above the folding point while the digitized spectrum is watched, a clean channel shows only the real in-band tone while a weak filter lets the buried ghosts fold back and land where they were never sent. Any spur that appears at the folded mirror position is a leak in that protection, and the test reads how much rejection the filter really gives before the edge of the band. It confirms that oversampling and the anti-alias filter together turn the worst out-of-band stress into an invisible residual instead of a fake reading.

SNR IMPROVEMENT · AVERAGING GAIN SNR dB averages N +10 dB / decade ideal 10·log10(N) correlated does not fall random noise falls with the square root of N verify with a clean random source

SNR improvement · averaging gainAveraging promises a known gift, each tenfold increase in records adding ten decibels to the signal-to-noise ratio, and the averaging-gain test verifies that the channel actually delivers it. A small periodic signal is buried in measured noise, a clean random source is used so the noise is truly uncorrelated from record to record, and the ratio is read before and after many averages; the improvement should track the ideal curve, ten decibels per decade of N. A shortfall reveals the real culprits, trigger jitter that smears the signal instead of aligning it, correlated noise that builds up instead of cancelling, or a detector that compresses as the summed signal grows. The test separates what averages away, true random noise, from what stubbornly stays, everything that is the same in every sweep, so it tells where the promise holds and where it leaks.

PHASE · QUADRATURE ACCURACY I 0° Q 90° ideal measured phase error amplitude and phase come from I and Q quadrature balance steers the reported angle

Phase · quadrature accuracyA synchronous measurement returns two numbers, an in-phase part and a quadrature part, and from them the detector draws an amplitude and a phase, so the phase-accuracy test checks how true that reported angle is. A phase shifter drives the signal at known angles relative to the reference, the measured phase is compared with the commanded one, and the difference is the phase error across the sweep. The error grows where the quadrature arm is not exactly ninety degrees, where the reference carries noise of its own so the whole rejection wavers, and where harmonic or spectral content bends the multiplication away from ideal. Reading both the magnitude and the angle together, and watching the error over frequency, shows where the synchronous detector can be trusted and where its imbalance steers the answer, until the calibration of the phase shifter itself becomes the limit.

SINAD · SIGNAL QUALITY level freq fund noise floor 2nd harmonic SINAD fund vs noise + distortion together ideal · (6.02·N + 1.76) dB

SINAD · signal qualityA single ratio summarizes how much of a measurement is the signal and how much is everything else that rides along, and signal-to-noise-and-distortion, SINAD, is that ratio: the fundamental divided by the sum, in the band, of the noise and the harmonic distortion together. It is the honest test of a conversion channel because it does not let a clean noise figure hide a distorting one, a part with low noise but a badly curved transfer still scores low on SINAD, and it collapses quantization plus thermal plus distortion into one number. For an ideal N-bit converter the best SINAD is about six point zero two times N plus one point seven six decibels, and comparing the measured against that ideal gives the effective number of bits. Sweeping the level and frequency shows where the ratio peaks, where harmonics lift above the floor as the signal climbs, and where the channel is at its most faithful.

SPURIOUS-FREE DYNAMIC RANGE level freq fund noise floor largest spur SFDR dBc the gap that hides or reveals a second signal more phase bits, cleaner code steps

Spurious-free dynamic rangeA clean frequency is rare by itself, a converter usually radiates a wanted tone and a scatter of unwanted ones, and the spurious-free dynamic range is the gap from the fundamental to the largest of those spurs. That single span is the window where a second small signal can sit above the floor and still be distinguishable, so it is the practical measure of how much a channel hides beside its real tone. The spurs come from the parts that do not stay ideal: a DDS truncating its phase word, a DAC glitching between codes, clock feed-through landing at mix products, each raising a ridge that peeks above the floor. Measuring SFDR means driving a single full-scale tone and reading the highest spur over the band in decibels relative to the carrier, and improving it is mostly hygiene, more phase bits, better code transitions, less clock leakage, until the biggest spur falls below the wanted noise level.

TIMING JITTER · TIE ideal edge timing early late σ jit TIE grows with time, period jitter stays near needs a timebase better than the device

Timing jitter · TIEA clock ticks at a nominally fixed time, and jitter is the amount by which each actual edge lands early or late relative to that ideal, a small wandering that no real oscillator avoids. The flavours differ by what you measure: cycle-to-cycle jitter, the difference between adjacent edges, period jitter, the variation of one period, and time-interval error, the accumulated drift of an edge from where a perfectly regular clock would put it, the one that grows most for long locks. Jitter comes from reference noise, from a VCO or PLL that wobbles, and from supply ripple that nudges every edge the same way, and it matters because a sampler late by tens of picoseconds decimates the highest-frequency content. Measuring it well needs a timebase better than the device, since an instrument cannot see jitter smaller than its own, and the result is reported as an average and a peak, the sigma that says how tight and the peak-to-peak that says how rare the worst edge is.

UPDATE RATE · DEAD TIME upd dead time: nothing is captured rate x record length = capture probability

Waveform update rateA digital instrument does not watch its input continuously; it captures a record, processes and draws it, re-arms, and captures again, and between any two captures lies a dead time in which it sees nothing at all. The waveform update rate is how often it completes that whole loop, frames per second, and together with the record length it sets the odds of catching a rare, one-off transient: the more frames per second and the longer each one, the shorter the blind windows and the higher the capture probability for a glitch that shows up once in a while. A high update rate makes a scope feel responsive, a spinning fan on screen instead of a sluggish crawl, but it is bought with deep memory, fast processing and pipelining, because the dead time is mostly the time to draw and measure, not the time to sample; for a pulse-catching role the spec that matters is not raw bandwidth but how little of its life the instrument spends blind.

JITTER TOLERANCE tracked by CDR too much jitter loop BW corner amplitude vs rate the RX still decodes below curve = clean, above = bit errors

Jitter toleranceJitter tolerance is how much jitter a receiver can eat before it starts producing bit errors, and it is never one number but a whole curve: on one axis the amplitude of the injected jitter, on the other its modulation frequency, and the boundary between the region where the receiver still decodes and the region where it faults. Slow jitter is almost free, because the clock-recovery loop tracks it, the loop being a narrow low-pass filter on phase, so anything it can follow is suppressed at the sampler; the trouble starts past the loop bandwidth, where the phase wander swings faster than the loop can track, and there the tolerance rolls off, so the corner of the curve is the loop bandwidth in disguise. Testing a link injects calibrated sinusoidal jitter, sweeps its frequency, and reads where bit-error ratio climbs, drawing the mask under which the device must still work; a curve that dips early means a receiver with too little internal margin, and the margin itself is the distance between the measured curve and the worst jitter the spec will allow.

QUANTIZATION +LSB/2 -LSB/2 stair vs true curve = residue between hal-lsb SNR max ≈ 6.02N + 1.76 dB

QuantizationNo converter can write the exact voltage it sees, because a number has only so many places; quantization is the rounding of an infinitely fine analog value onto the finite ladder of levels a code can name. Between two adjacent steps the truth and the chosen code differ, and that difference, the quantization error, rockers within plus or minus half a least-significant step, never vanishing no matter how careful the hardware, because it is a stamp of the numbering itself rather than a fault of parts. Spread across a busy signal the error behaves like noise, uniform, adding on average the voltage of a step divided by the square root of twelve, and this noise is what caps the signal-to-noise ratio of a perfect converter at about 6.02 times the number of bits plus about 1.76 decibels, the 6-decibels-per-bit law every datasheet quietly assumes. So a converter is a bargain between resolution and range, and its true accuracy is set not by its label of bits, meaning its ideal steps, but by how far its real steps drift from that ideal, which is exactly what the transfer curve exposes.

DNL · MISSING CODE jumps 2 LSB a step > 1 LSB skips a code in between never falling with rising input = monotonic

Differential Nonlinearity · DNLA real converter does not space its steps evenly; differential nonlinearity is how much each step deviates from the ideal one least-significant-bit width it should have. On the transfer curve, where output code and input voltage climb together, an ideal part draws steps of equal width, but a practical one draws some too thin and some too fat, and the DNL of a step is that width error measured in LSB, with the same sign as the squeezes or the stretch. A single step can be so fat that it swallows its neighbour and the output jumps by two levels at once, skipping a code no input can ever produce, a missing code, and when DNL goes more negative than minus one LSB, meaning a step thinner than nothing, the output can even fall as the input rises, the non-monotonicity that can break a control loop that punches a fixed monotone ramp. So DNL is the datum sheet figure that tells whether a converter has holes in its ladder, and every mission-critical conversion gets strobed with a slow ramp specifically to hunt for the missing codes hidden in the steps.

PSRR rail ripple ΔVs leaked ΔVo rail moves a lot, output barely stirs PSRR = 20·log(ΔVs / ΔVo) dB, high is good rejection rolls off with rising frequency

Power Supply RejectionEvery regulator runs off a rail that is never perfectly still, and power supply rejection ratio, or PSRR, is how much of that rail noise the regulator lets leak into its output, measured as the ratio of the ripple on the supply to the ripple that survives on the output, expressed in decibels. A high PSRR is a deep muffler: a thousandth of the supply ripple reaching the output shows up as 60 decibels of rejection, while a poor path lets a measurable sinusoid poke through, and the number is never one but a whole curve across frequency. Near DC the loop of the regulator has all its gain and rejection is best, but as frequency rises the gain falls and the rejection erodes, so the fine details of a fast regulator, an LDO with a wide loop bandwidth, decide whether the rejection curve stays high out to the ripple riders and the switching noise that live at kilohertz and megahertz. Testing PSRR injects a small sinusoidal ripple onto the rail, sweeps its frequency, and reads how small a copy appears at the output, drawing the shield that tells how isolated the clean rail really is from the filth that feeds it.

LOAD REGULATION Vnom ΔV no load full load output sags as load grows, loop fights back load reg = V(nl) - V(fl), / V(nl), smaller is stiffer

Load RegulationAn ideal regulator holds its output exactly no matter how much current the load draws, and load regulation is how far a real one falls short: the change in output voltage from no-load to full-load, usually quoted as a percentage or in millivolts, the smaller the better. The droop comes from real parts, the resistance of the pass element and the finite gain of the error loop, and it has direction, normally the output sags as the load grows, though an overhung loop can let it overshoot and settle slowly instead. A fast load step is the sharper test: the loop reacts after the fact, the output dips a little before the correction catches up, and the size of that dip, the transient response, together with how quickly it returns, tells more about a regulator than the quiet steady-state number ever can. Under test the load is slammed from light to heavy and the output watched for the settled offset and the transient notch, and the figure that results separates the truly stiff rail from the one that droops when it is actually leaned on.

VSWR Vmin Vmax forward + reflected waves build a fixed pattern VSWR = Vmax/Vmin = (1+|Γ|) / (1-|Γ|) 1:1 is a perfect match · a big number is a bad one

Voltage Standing Wave Ratio · VSWROn a line that does not match its load, the forward wave and the reflected wave ride over each other and build a standing wave, a fixed pattern of fat peaks and thin nulls that does not travel, and voltage standing wave ratio, or VSWR, is the ratio of the tallest peak to the deepest null it produces. A perfect match casts no reflection, so there is no standing pattern and the ratio is a clean 1 to 1; the worse the mismatch, the deeper the nulls fall and the higher the ratio climbs, until a total reflection sends it to infinity. The reflection coefficient, the ratio of the reflected wave to the forward one, is the same beast viewed from the other side, and the two are linked by a simple swap: VSWR equals one plus the magnitude of the reflection over one minus it. Because it is easy to read on a test set, VSWR is the familiar dial of antenna and cable work, and it is also a quiet verdict on the quality of every connector and barrel in between the transmitter and the antenna.

EVM ideal error cloud of samples vs the perfect grid point EVM = |error| / |ideal|, percent, smaller is cleaner

Error Vector MagnitudeEvery demodulated symbol is supposed to land exactly on its constellation point, a voltage and a phase the transmitter chose, and error vector magnitude, or EVM, is how far the received symbol really lands from that perfect spot, measured as the length of the error vector between them and quoted as a percentage of the ideal length. A tight transmitter and a clean channel drop each sample onto a small cloud around its point, and a small EVM means few samples stray far enough to be mistaken for a neighbour; a loose transmitter, a noisy path or a smeared filter blows the cloud into a big haze that reaches across to where the next symbol lives. EVM is the shorthand of digital radio quality, because it sums the noise, the phase error, the imbalance and the interference of the whole link into one number, and it maps directly to the rate at which the demodulator begins to misjudge symbols. Measured with a test receiver that knows the ideal grid, it tells whether a radio is clean enough to push its constellation to more levels or must fall back to a sparser, more robust scheme.

ISI · EYE echoes after each edge bleed into the next symbol eye opens during the clean window, closes with war

Inter-Symbol Interference · ISIA symbol should live in its own slot of time, but a real channel sponges the pulse, spreading it so that energy from one symbol slops over the edges of its own slot and stains the symbols beside it, and inter-symbol interference, or ISI, is that smearing of one pulse into its neighbours. The eye diagram is the classic confession: all the received symbols painted on top of each other, forming an eye-shaped opening whose height and width are the margin a sampler has to decide a clean decision. A clean channel paints a wide, tall eye and a small dot on the screen; ISI, from a band-limited medium, a lossy trace or the wrong equalization, closes the eye, lowers the opening and thins the margin, until a sampler at the middle of the slot can no longer tell a one from a zero. Equalizers fight the smear by cancelling the predictable ghosts, and the height of the reopened eye is the most honest measure of how much the trail of past symbols still haunts the present decision.

ACQUISITION · LOCK TIME f ref VCO acquisition region LOCKED frequency converges, then phase settles before it counts slow loop filters noise but takes time to catch up

Acquisition · Lock TimeAcquisition, or lock time, is how long a loop takes to stumble from being far off-frequency into a settled, locked state, the capture drama of a loop. When a feedback clock sits far from the reference, the loop sees a messy beat rather than a clean phase error, and the VCO must be dragged across a wide band before a usable edge appears; locking usually happens in two stages, a fast frequency skirmish that buys a coarse pull-in followed by a slower phase polish that closes the last gap. A narrow loop bandwidth is quiet but slow, filtering the noise of the correction while letting the loop crawl; a wide bandwidth snaps to lock almost at once but lets more correction noise in, so acquisition time is forever a trade between speed and the cleanness of the settled tone. Many loops change their gain as they cross from frequency hunting to phase locking, softening the pull-in so the final settle does not overshoot and ring. Specifying acquisition time tells whoever must wait on the clock whether the card can come up in time, and its inverse is how quickly a freshly powered radio or a recovering channel can start talking.

PULL-IN · HOLD-IN f0 freerun hold-in capture lock-in capture is how far it can be led home, hold-in how far it stays

Pull-In · Hold-In RangeA loop holds its lock only across a limited window of frequencies, and pull-in tells how far that window reaches when the loop starts from far away, hold-in how far it keeps the lock once it has settled. If the free-running frequency of the VCO drifts or the reference moves, the feedback of the loop must steer the oscillator against that error; the hold-in range is the widest band in which the loop just manages to keep the phase lock, and at its edge the static phase error grows until the loop surrenders. From a cold start the story differs: a loop cannot even begin to lock if the initial gap is too wide, so the capture range, the biggest offset it can seize from rest all at once, is set by the loop bandwidth rather than by its holding power. Beyond capture lies the pull-in range, the span the loop can still be coaxed into locking through a slower beat process even when it cannot grab the lock instantly. The reach of a loop is therefore given by two numbers, one telling how far it can be found and led back home, the other how far it stays once already home, and both are drawn around the center of the VCO.

DITHERING + dither ΣΔ ADC after quantizer smooth blur harsh bins a weak whisper stirs stuck points into an honest average

DitheringDithering is the deliberate addition of a whisper of noise before a digitizer, a trick that breaks the harsh, fixed patterns of quantization into a smooth blur and rescues the fine detail a converter would otherwise crush. A perfect quantizer rounds every input to the nearest step, and a small input that never crosses a threshold sits forever silent while a steady one sits frozen at a folded error; the added noise stirs those stuck points, dithering the output so that a weak signal averages out to its true value across many samples instead of slamming into one bin. The cost is paid elsewhere: the noise that dither adds covers the quantization error so it looks random, trading an honest-but-ugly distortion for a mild hiss that averages down when many samples gather. Averaging many dithered reads recovers very small signals lying well below a single step, which is how converter front ends reach a resolution finer than the LSB alone would allow. Dither is not a fix for a noisy converter; it is a trick for turning a coarse one into an honest one.

CONVERSION TIME aperture convert / settle handoff word out one conversion, then it repeats at the throughput rate throughput = 1 / conversion time fastest change the converter can follow

Conversion Time · ThroughputConversion time is the full interval a converter takes to turn one requested sample of the input into a finished digital word, and its reciprocal, the throughput rate, is how many such words fly out each second. Inside that interval sit the acts of the pass: the aperture in which the front end catches the signal, the comparison or counting in which the quantizer settles its answer, and the digital handoff that pushes the word out, and the slowest of these sets the wall the others must fit inside. A flash converter settles in one fast compare while a successive-approximation or integrating kind spins through many, so a given architecture buys throughput with its own cost in area, power and resolution. Conversion time sets the fastest input the digitizer can follow, because an input that changes faster than the converter samples is caught as a pair of unrelated snapshots, and it also sets latency, how long a controller must wait before a sample it asked for is truly ready. Faster sampling captures more of a jagged signal, but speed always trades against how many bits the settled word can honestly carry.

BANDWIDTH · SELECTIVITY passband strong neighbour skirt steep skirt: keep neighbours out without shaving the signal

Bandwidth · SelectivityBandwidth is the width of frequencies a receiver opens for a wanted signal, and selectivity is how firmly it slams the door on everything just outside that window, together deciding whether a faint station can still be heard with a strong neighbor pressed beside it. A narrow window keeps interference out but can shave the edges of the signal it wants, while a window too wide lets a loud channel bleed in and mask the one at hand. The shape of the filter skirt holds the whole trade: how quickly the response rolls off, how flat it stays inside the passband, and how much energy leaks into the bands beyond, and these curves set both the sensitivity to weak signals and the immunity to close, powerful ones, so a receiver is really designed around the compromise drawn in that slope.

SPURIOUS RESPONSE wanted signal ghost a stray product lands in the band with no real station there LO purity and shielding decide how loud the ghost speaks

Spurious ResponseA spurious response is a sound the receiver makes where no real station sits, born when unwanted mixing products, harmonics, or clock leakages land exactly inside the tuned band. A mixer multiplies not only the wanted signal but every stray tone that slips in at its ports, and any pair of them that beats down to the passband fakes a carrier that even a clean filter cannot tell apart from a genuine one. The order of the harmonics, the shielding between stages, and the purity of the local oscillator all decide how loudly these ghosts speak, and how far an interfering frequency must move away before it stops falling on the receiver voice, which is why spurious performance keeps every unexpected tone that far out of the way.

FREQUENCY AGING ppm yr 0 yr 5 slow drift over months and years, quoted in ppm per year steeper in the first year, calmer after; budget must reserve it

Frequency AgingFrequency aging is the slow, steady drift of an oscillator output away from its nominal value over months and years, a change baked into the crystal, its package and its aging stresses, quoted in parts per million per year. A reference may be near perfect the day it is born and still wander off its mark with time, so every accuracy budget must reserve a long-term allowance on top of the noise and temperature errors of the moment. The decay of a crystal is not random, it is a curve that the maker maps and sells, steeper in the first year and calmer after, and how much of that wander a system can tolerate sets how often it must be re-disciplined, re-trimmed or replaced. Aging is the patience test of a frequency reference, the reason a clock that was perfect at calibration is trusted to still be true a year later, measured by how far the trust has to stretch.

CLOCK HOLDOVER REF LOST error grows ref gone: the clock free-runs on the oscillator alone holdover budget states how long the drift stays under a limit

Clock HoldoverHoldover is what a disciplined clock does when its reference disappears, the moment the control that had been chasing some master signal is gone and the oscillator must run free, keeping the last known frequency while drifting slowly on its own character. The clock cannot stop, so it shifts from following to remembering, holding the output as close as the crystal and its thermal state allow and accumulating a small error that grows with time. A holdover budget states how long the clock may be trusted before that drift crosses a tolerable limit, and how large the error was allowed to climb, and a good clock spends its effort on the long, calm memory of a stable oscillator and the care that keeps its environment steady while the reference is away. Holdover quality is measured not in an instant but in minutes and hours, the distance the free-running output wanders drawn against the time it spends alone.

BIT CLOCK · DATA SAMPLING sample here window the strobe must catch the quiet center, not a transition jitter steals from the safe window on both sides of the edge

Bit Clock · Data SamplingA bit clock is the strobe that tells a receiver exactly when to read each incoming data bit, and its timing quality decides how wide the safe window is where every bit can be trusted. If the clock edge lands early or late against the changing data, the receiver samples near a transition and risks grabbing the wrong value, so the recovered clock must aim for the quiet center of the eye where the bit is settled. Jitter on the bit clock steals from that window, opening the margin on one side and closing it on the other, while duty-cycle error, wander and the ripple riding on the reference all push the sampling point off center, and the margin that remains is the budget the link lives on. A bit clock is good when it stays put, centers its edge on the data and leaves enough untouched time around that edge for every receiver sharing it to make a safe, certain decision.

CLOCK SELECTION switch A B continues seamlessly handover lands at a phase boundary, no partial edge leaks no runt, short or stretched cycle across the switch

Clock Selection · Glitch-Free SwitchClock selection is the act of switching a system onto a different clock source, and a clean switch must do it without ever producing a runt, short or stretched cycle, because a single malformed period can corrupt a counter, a serial frame or the timing of a clocked converter. A glitch-free switch holds the output steady until the incoming source and the device agree on a phase, then slips the output over at a boundary where no partial edge leaks out, and if the two clocks differ the change is made with the grace of a quiet phase step rather than a torn pulse. The switch is judged by whether no cycle is ever too short or too long, how seamlessly it lands between two running streams, and how calmly it holds the output when a primary source disappears and a backup takes over, which is why quality clocking makes every handover a transition the rest of the system never has to notice.

THIRD-ORDER INTERMODULATION f1 f2 2f1−f2 2f2−f1 products land inside the band where no signal was sent IP3 rates the headroom before the device bending pollutes

Third-Order IntermodulationThird-order intermodulation is what happens when two strong tones drive a slightly nonlinear stage, producing new tones at twice one frequency minus the other that land exactly inside the passband where no real signal was sent, and these intermodulation products masquerade as genuine carriers and steal capacity from the wanted band. A perfectly linear device would pass the two input tones and nothing else, but real gain and real conversion bend ever so slightly, and that bend manufactures the third-order products whose level grows three times as fast as the input tones grow. The intercept point, quoted as IP3, is the imaginary input level where those products would catch the fundamentals, a single number that rates how much headroom a stage has before its own bending begins to pollute the spectrum, and a two-tone test drives this battle out into the open so the products can be measured and the headroom judged.

NOISE FIGURE S+N DUT SNR out hot / cold hot versus quiet source yields NF by the Y-factor the first stage dominates the cascade figure

Noise FigureNoise figure is the number, in dB, that tells how much a stage degrades the signal-to-noise ratio of what passes through it, a stage that adds no noise scoring zero and a lossy, noisy one piling up a large figure. It is measured by feeding the device a known noise source, alternately hot and quiet, and reading the rise in output, a method (the Y-factor) that turns the extra output into a figure of additive noise independent of the input. The cascade law sharpens the lesson: the noise of an early stage is amplified by everything after it while the noise of a later stage is merely added, so the very first stage, usually the low-noise front end, dominates the total figure and every dB saved there saves a dB for the whole chain. Because it separates what the device adds from what the signal carried, noise figure is the honest account of how much a receiver buries a faint signal under its own hiss.

LOCK DETECT lock time hunting locked the flag rises only when the error stays small

Lock · Loss of LockLock is the state where a loop has stopped hunting for the reference and now rides it steadily, the phase error held near zero while in lock and drifting freely when it slips out, so a receiver or synthesizer rests on the reference only as long as the loop holds its grip. Detection watches a filtered phase or frequency error and raises a flag when it stays small for long enough, then drops the flag when the error grows, and the thresholds that set these moments trade strictness against noise, since a tight window shouts loss of lock at every tiny tremor while a loose one sleeps through a real slip. The time the loop needs to reach this settled grip is the lock time, and after that the value of the reference survives only as long as the flag is held, so lock detection is the arbiter that tells a system when it can trust its clock.

CYCLE-TO-CYCLE JITTER t1 t2 t3 t4 neighbouring periods differ, histogram shows the drift consecutive edges are compared at the very next tick

Cycle-to-Cycle JitterCycle-to-cycle jitter is the restless change in the length of a clock period from one cycle to the next, the difference between neighbouring periods measured as the drift of each period around its neighbour, not around a fixed ideal. Where long-term jitter watches how far a clock wanders over many cycles, cycle-to-cycle looks only at the jump between consecutive cycles, so it catches the sudden, edgy chores a clock repeatedly does, and a pair of periods measured back to back is compared and the shift jotted down. It is measured by timing many adjacent pairs and building the spread of their differences, and that spread tells how much the very next edge can step, a number that matters to circuits that must fire many stages on consecutive edges without letting one period strangle the next.

SETUP · HOLD CLK DATA sample setup hold be still before the edge, stay firm after it

Setup · Hold TimeSetup and hold are the two edges of a timing window around a sampling clock, the early moment when the data must already be firm and the later moment when it must stay firm, so a register can capture a value without catching it glitching. Setup is the span before the clock edge that the data must hold still, hold is the span after it, and a design that leaves enough margin in both turns a flaky capture into a dependable one, while timing analysis checks every path between registers to find the paths with the narrowest slack. The margin left on a path is its slack, and a positive slack means the logic settles early enough and stays long enough, while a negative one means the timing is violated at the moment the register tries to grab its value, so setup and hold tests sweep the edge timing to draw the shmoo where a design works.

CLOCK-DOMAIN CROSSING clk A clk B DOMAIN A ? SYNC DOMAIN B a bit caught mid-flip may hover unresolved two registers settle it before the far side reads

Clock-Domain Crossing · MetastabilityA clock-domain crossing hands a signal from a circuit running on one clock to a circuit running on another, and because the two edges never line up, a signal caught exactly at the wrong instant may land in a metastable state that is neither one nor zero, sitting unresolved for a while before it picks a side. A synchronizer, two registers in series, gives that flapping bit two clock edges to settle, so by the time the rest of the domain reads it, the value has become a clean one or a clean zero, though a fragile signal usually travels through gray-coded or handshake logic to be safe. The risk is real but bounded: a synchronizer makes the chance of a bad capture tiny rather than zero, so crossing designs count on both the settling time of the flops and the margin left, and a crossing test checks the headroom that keeps a one or a zero from being read in mid-flight.

PROPAGATION DELAY IN OUT t_p the time a gate needs after an edge to answer value and direction depend on the load it drives

Propagation DelayPropagation delay is the time a logic element needs to answer, the gap between the instant its input crosses a decision level and the instant its output starts to move, a small but real laziness that a timing chain has to budget for. Every gate, buffer, and flip-flop carries its own delay, and when many are strung in series the delays add up along the path, so the total that a clock has to wait on is the sum of every stage between the edge and the answer. Delay grows with the load a stage drives and shrinks with a higher supply, so a number quoted once cannot be trusted on its own, and timing analysis uses best-case and worst-case numbers to see whether a path still settles before its deadline across temperature and parts.

SENSITIVITY thresh hit miss the weakest signal that still clears the gate

SensitivitySensitivity is the weakest signal a receiver or detector can still catch, the smallest level that clears its threshold and registers a hit, so it draws the lower edge of what is usable out of all the noise and loss in the chain. Below that level the signal drowns in the noise floor and cannot be trusted, at it a marginal hit appears, and above it detection grows surer, so sensitivity is quoted as the point where a weak input still yields a usable output at an acceptable error. It is set by the noise figure of the front end, the bandwidth, and the threshold, a trio that eats into the smallest noticeable signal, and it is measured by feeding a signal down until the output barely qualifies, which is why sensitivity sums up the entire front end in a single number.

POWER SPECTRAL DENSITY carrier phase-noise skirt skirt noise floor f → energy sits at the line, phase noise spills the skirts

Power Spectral DensityPower spectral density is how the noise and signal energy of a clock or waveform are spread across frequency, the power held in each small slice of the spectrum instead of the total in a single number, so it shows not just how much energy there is but where it sits. A clean clock pours its energy into one tall line at the fundamental, a jittery one spills skirts of phase noise around it, and wideband noise paints a low floor across everything, so a density plot reads the health of a signal at a glance. Units of power per hertz let measurements from different bandwidths be compared fairly, and it is measured by sweeping a spectrum analyzer or computing a periodogram, which is how the shape of a signal noise is seen as clearly as its average level.

SLEW · DRIVE IN OUT sharp input, sloped edge, heavy loads soften it more slew and current set how clean the edge arrives

Slew Rate · Drive StrengthSlew rate is how fast a driver can move its output from one level to another, the sharpness of the edge it can push, while drive strength is how much current it can lend to charge a load, and the two together set how clean a fast edge survives into a heavy wire. A driver with a gentle slew blurs an edge into a long ramp that a receiver may read at the wrong time, and one with weak drive sags or rounds when it must move several loads at once, so strong, swift drivers are chosen for long buses and crisp edges. Slew and drive trade against power and noise, since rushing an edge injects ringing and radiation, so the right driver is one whose edge is sharp enough for the receiver yet calm enough not to shout.

LOGIC THRESHOLD · TRIP POINT Vth Vout Vin reads 0 reads 1 the snap cross the trip point and the output snaps over below it reads a 0, above it a 1, lingering in the middle reads a glitch

Logic Threshold · Trip PointA logic threshold, or trip point, is the input voltage at which a gate finally decides whether a 0 has become a 1, the level where the continuing rise of a signal crosses the uncertain middle and the output snaps from low to high. It splits the world of inputs into a definite low zone and a definite high zone, and anything that lingers in the band between them leaves the output reading a sliver of level that a fast gate turns into an ugly edge or a momentary glitch. A gate with a high threshold asks for a stronger high and tolerates a shallower low, while a low threshold is gentler on a high yet fussier about noise on its low side, so the trip point is where the tolerance for rise and fall, for noise and for speed, all meet.

INPUT DYNAMIC RANGE noise floor min detectable clips here DR [dB] from the noise floor up to clipping, the span it still handles lower the noise or raise the headroom to widen the range

Input Dynamic RangeAn input dynamic range is the span of signal strengths a circuit can still handle correctly, from the faintest level it can reliably detect above its noise up to the loudest it can accept before it clips, compresses or distorts. Every stage has a quiet bottom where noise buries the signal and a loud top where it runs out of headroom, and the dynamic range is the log-distance between those two walls, often expressed in decibels. A wide dynamic range lets one receiver find a weak signal while a loud neighbor is on the air, and it is won by lowering the noise floor, raising the saturation point, or both, since a very quiet and very linear front end is the price of hearing the small without being deafened by the large.

DROOP · LOAD TRANSIENT droop recovery Iload step Vout a load step sags the rail, then the loop pulls it back the dip depth and the recovery time grade how stiff the supply is

Droop · Load TransientA load transient is a sudden step in the current a supply must deliver, and droop is how far the rail sags when that step lands. Real loads switch in and out faster than any loop can react, so when the demand jumps the output dips first and only then does the control loop wake up and pull it back, leaving a dip whose depth and recovery time tell how stiff the supply really is. A stiffer rail is built with a lower output impedance, enough output capacitance to hold the volts through the first instants, and a loop fast enough to recover before the droop bites, and the transient measurement feeds a step and watches the sag, the recovery, and the overshoot to grade the whole response.

QUIESCENT CURRENT · STANDBY quiescent baseline active burst active burst I the tiny current a rail draws while the load sleeps every microamp counts when it waits for years on a battery

Quiescent Current · Standby PowerQuiescent current is the small amount of current a circuit drains from its supply while it sits idle, with its loads off and nothing being asked of it, the floor below which standby operation cannot fall. It comes from the bias stages that must stay alive, the references that keep a constant, and the quiescent paths of any amplifiers, and every microamp counts when the device sleeps for months on a battery. Low quiescent current is won by shutting down whole blocks, clocking no faster than needed, and letting every unused stage sink nothing, which is why standby current is quoted as the single most important number for anything that must wait for years and still wake on demand.

GAIN FLATNESS · FREQUENCY RESPONSE measured response ± ripple bounds passband how far the gain may wander and still pass the test a flat band reads the same at every frequency it was promised

Gain Flatness · Frequency ResponseGain flatness is how little the gain of a path changes across a band, the peek and valley the response is allowed to wander between while still being called flat. A perfectly flat amp hands the same gain to every frequency it was promised, while a wavy one passes some tones louder and others softer, coloring the signal evenly across the band only if the ripple stays inside the guardrails. The measurement sweeps a source across the band and records the highest and lowest gain, quoting a flatness figure like half a decibel that says how much a tone at one edge differs from a tone at the other. It decides how faithfully a filter, cable, or amplifier treats all the frequencies as equals instead of favoring a few.

IN-BAND RIPPLE · GAIN ERROR ideal ripple error f → the wobble above and below the line the band should hold a sag or a bump is a gain error that colors certain frequencies

In-band Ripple · Gain ErrorIn-band ripple is the wobble of a response inside its own band, the sag and bulge around the ideal line that the passband was supposed to hold flat, and it is quoted as the peak-to-valley swing of that wobble. It is not a loss of the band but an unevenness inside it, making some tones arrive a little louder and others a little softer than they should, which for a filter or amplifier means a faint color laid over the signal. The measurement slides a tone across the band and records the highest and lowest points, and a small ripple figure means the response barely leaves the line. It matters wherever a set of frequencies must be treated the same, since a ripple that is small in one design may be the main error in another.

HYSTERESIS MARGIN turn-on level turn-off level hysteresis wider dead zone ignores more noise but delays the flip the room between on and off decides calm versus chatter

Hysteresis MarginHysteresis margin is the separation between the two trigger levels of a Schmitt or comparator, the width of the dead zone where the input can wander without flipping the output. It is the gap that decides whether the device reads clean or chatters, because a margin wide enough to swallow the noise on the edge gives one calm transition, while too narrow a gap lets the output rattle on a wobbly edge. The margin is a trade between noise and speed, since a wider gap ignores more noise but also makes the device wait longer to respond and moves its effective trip point, and it is measured by sweeping the input up and down and reading the two levels it flips at. It matters wherever a threshold must be steady against a noisy signal, and the right margin is the smallest that still holds still.

LEVEL MARGIN · OVERDRIVE GND / ref signal level threshold margin more room above the line, later it trips, safer it is

Level Margin · Overdrive HeadroomLevel margin is how far a signal sits from the threshold it must cross, the overdrive left over between the level and the trip point that guards a decision against noise. A signal parked deep above its threshold trips with plenty of room and shrugs off small noise, while one that barely clears it can be nudged back across the line by a small blip, so the margin is the room that decides whether a level stays put or flutters. It is quoted as the voltage or decibels separating the operating level from the threshold, and it is won by aiming the nominal well above the trip and holding it there as parts and temperature drift. Wherever a threshold must be decisive, the margin is the honest measure of how much trouble it can absorb and still decide right.

SECOND-ORDER INTERMODULATION f1 f2 two tones in nonlinear f2-f1 f1 f1+f2 the sum and the difference sneak out beside the originals second-order beats land at f2 plus f1 and f2 minus f1

Second-Order Intermod · Two-Tone IMDSecond-order intermodulation is the outcome of a nonlinear stage mixing two tones and making new tones at the sum and the difference of their frequencies, products a clean stage would never generate. With two inputs at f1 and f2, a squaring bend in the transfer spits extra energy at f2 plus f1 and at f2 minus f1, and how much of it appears shows how far a stage stretches from linear. It matters where a weak wanted signal must sit beside a strong one, because the difference product can land right on top of the weak signal and bury it, and the sum product can fold unwanted bands into view. It is measured by driving two tones in and reading the rising product tones against the carriers, quoted as a ratio in decibels, and tamed by choosing devices, bias, and filtering that keep the bend small where it would hurt.

TOLERANCE · DECISION ALLOWANCE nominal upper bound lower bound the band promises a bound every part and temperature must hold

Tolerance · Decision AllowanceTolerance is the bounded window a part is promised to live inside, the tightest and loosest value it will take across pieces, temperature, and age, quoted as a plus and minus around a nominal. It is the deal a designer strikes with reality, because every part will drift from its ideal and the tolerance sets how far it is allowed to wander before the claim is broken, so a well-chosen spec keeps the worst cast still inside the room the design needs. Its cousin is the allowance left for a decision, the headroom between where a signal can sit and where it would flip a verdict, and both are budget consumed by the drift of parts, the heat of the day, and the years. Tightening the band costs, while leaving it loose risks, so the honest tolerance is the widest that still keeps every real unit inside the promised margin.

BAUD RATE · SYMBOL TIMING Ui = 1/baud sample here, in the middle of the open eye the wider the open middle, the more timing drift the link forgives

Baud Rate · Symbol TimingBaud rate is the number of symbols a link launches in one second, while bits per second is the baud times how many bits each symbol carries, so the two numbers part company as soon as a mapper rides many bits on one symbol. The rate needs steady timing, because the receiver samples each symbol at its heart and a clock that drifts makes it sample late until it slides into the wrong interval and the eye closes. It is set by the bandwidth and the shape of the pulses, since sharp edges cling more data per second but ring and spill into neighbors, and the honest baud is the fastest whose eye still stays open against the noise and the timing jitter left over. Measuring it means finding the limit where the symbol interval grows wide enough to guess right every time.

RSSI · RECEIVED SIGNAL STRENGTH racked power strong dBm what counts is how far the reading sits above the noise floor

RSSI · Received Signal StrengthReceived signal strength is the power that lands at the receiver input when the transmitted wave arrives, the level a detector measures and reports as a small digit, and it is the first tell that a link is healthy or fading. A strong number means plenty of margin above the noise, while a weak one warns that the channel has leaked or the distance has grown, and because the power falls off quickly with distance the number is a fast and rough sense of range. It quotes in decibels relative to a fixed level, and it pairs with the noise floor, since what matters is how far the signal sits above that floor, not the absolute figure alone. It is the gauge that steers antenna aiming and power control, a cheap eye on a link that would cost much more to watch with full words.

THD+N · DISTORTION PLUS NOISE freq → level f 2f 3f 4f 5f noise floor sum the copies on top of the noise, put it against the tone

THD + N · Distortion Plus NoiseTotal harmonic distortion plus noise sums every unwanted thing riding on a cleaned tone and puts it against the fundamental, an honest number that folds the harmonics a stage bends out together with the noise floor underneath. A clean stage threads a tiny bit of dirt onto the tone, so the ratio stays high, while a sick one spills many small copies up and down the spectrum and drowns the floor, making the figure a fast and fair verdict on quality. It is quoted as a percentage or in decibels, and the measurement must bracket the true fundamental and the whole mess beside it, so the test tone, the bandwidth, and the quiet of the instrument all set what the number means. It is the single number that tells how much of what a device sends out was really asked for.

MINIMUM DISCERNIBLE SIGNAL noise floor just above the hiss the margin to call it real the weakest whisper a receiver can still name a friend

MDS · Minimum Discernible SignalThe minimum discernible signal is the weakest tone a receiver can still make out above its own noise, the level at which the whisper of the signal just clears the hiss and a listener can say it is there. It is set by the noise that crowds the input and by the margin above that noise a person or a sensor needs before a blip reads as real, so a quiet front end and a cheap noise figure pull the threshold down. Making it smaller means shaving the noise floor or needing less margin, and every decibel saved at the front is a decibel of range won at the far end. It is the honest price of being able to hear something very faint, and the number that decides how weak a signal a receiver can still call a friend.

PSK ERROR · VECTOR ERROR ideal phase circle received the missed mark the gap between the ideal mark and the noisy landing

PSK Error · Vector ErrorPSK error is how far a received phase-shift keyed symbol lands from the exact point that was sent, the little gap between the ideal spot on the circle of phase and where the noisy wave actually arrived. In phase-shift keying each symbol lives as one clean phase on a given ring, so a receiver that sees a slightly wrong angle has to guess whether a 0 or a 1 was meant. Noise, drift and the leftover distortion of the chain all push the received phasor off its mark, and how far that mark gets missed is the vector error. Measuring it sums the size of all those misses and states them as one number in degrees or as an error magnitude, so a link with a small PSK error reads its symbols cleanly, while a large one flips bits near the edge. It is the honest yardstick for how straight the phase of a signal really arrives.

TIMING JITTER · EDGE WANDER ideal clock edges land a hair early or late the slip when each change should be done but is barely not

Timing Jitter · Edge WanderTiming jitter is the wandering of an edge from the instant it should have happened, the little sway of when a signal actually changes against the calm grid of the clock. Every edge lands a hair early or late, and when those hairs pile up near the sampling moment the receiver can read the wrong bit just because the edge slipped. It is set by noise on the line, power that sags, and the leftover randomness of the clock buffers, so a tighter stream of jitter leaves more margin before a sample goes wrong. It is the enemy of high speed, because the faster the timing the smaller the window, and the honest clock keeps its edges so settled that even under load the sampler still guesses right every time.

SINAD · SIGNAL TO NOISE AND DISTORTION wanted signal S signal + noise + distortion N+D S N+D dB how tall the tone stands above all the junk it drags along

SINAD · Signal to Noise and DistortionSINAD measures how much louder the wanted tone stands above the junk it drags along, the ratio of the wanted signal power to the sum of the noise and the distortion power riding on top of it. A clean carrier with a quiet floor shows a high number, while a chain that adds hiss or bends the shape of the wave shows a small one, and that single figure folds every imperfection of the path into one honest score. It is the cousin of SNR, but stricter because it counts the distortion a signal makes in itself alongside the noise from the world outside. A good SINAD means the wanted tone fills nearly the whole reading and the leftover barely whispers.

NOISE BANDWIDTH · EFFECTIVE WIDTH the filter shape noise floor effective noise bandwidth BW same noise as curve the width of a flat passband that lets in the same noise

Noise Bandwidth · Effective WidthNoise bandwidth answers how wide a filter really is in terms of the noise it lets through, the width of a perfectly flat band whose rectangle swallows the same noise as the filters gentle curve. Because every band admits its share of the noise that hides in the link, a wider passband welcomes more of it even when the wanted signal stays the same height, and losing the measure of that width hides the truth of how clean a signal can be. It is smaller than the cut where the filter rolls off, since the shoulders and the skirts still take in some noise before they die away, so counting the true width of the flat bandnames the real penalty. A designer who knows it can trade a little reach for a quieter floor, and the honest filter is the one whose useful band stays tight while letting the noise it carries shrink with it.

RIPPLE · OUTPUT WANDER coarse deep sawtooth ripple rides on the rail ΔV nominal level a small sway after every switch the millivolts between the top and the bottom of the rail

Ripple · Output WanderRipple is the small periodic sawtooth that rides on top of a nominally flat supply, the little rise and fall of the output that follows the switching rhythm each cycle as energy is loaded and then drained. Because a real converter adds a charge then lets it leak away until the next stroke, the output can never sit perfectly still and instead sways between a top and a bottom after every switch. The gap between those two levels is the ripple, usually stated in millivolts or as a fraction of the output, and a tight converter keeps that sway small even while it pours a steady current. A ripple that grows with current or with load shows a filter and a loop working harder, so measuring the wander tells how steady the rail really is. The honest supply holds its level so quiet that the ripple stays a whisper rather than a hum.

DROOP · LOAD TRANSIENT DIP load step hits droop recovery V target the first notch it takes before the loop pours enough back in

Droop · Load Transient DipDroop is the sudden sag of a supply line when the load grabs a bigger current all at once, the dip the output takes in the first instant before the loop can pour in enough to hold it. When a heavy step of load hits, the stored charge in the capacitors is grabbed first and the rail falls a notch before the controller wakes up and measures the shortfall, then recovers back toward the target over a short settling time. The depth of that first notch and how long the recovery takes are the honest measure of how nimbly the supply answers, so a good loop keeps the dip shallow and the return quick even under a sharp load step. A designer who knows the droop can size the storage and the response ahead of the storm, and the honest converter dips only a little and comes right back to its mark.

INL · INTEGRAL NONLINEARITY ideal line code → out the bow away from the line INL error

INL · Integral NonlinearityIntegral nonlinearity measures how far the real transfer of a converter bows away from the perfect straight line, the largest sideways drift of the actual staircase from the ideal one that runs from zero to full scale. Every real converter bends a little, because weighted pieces never match their ideals exactly, and that bow shows up as a smooth curve of error across all the codes. INL gathers the whole journey into one number, telling the worst point where the output sways from the line drawn by a flawless device. A small INL means the staircase hugs its ideal all the way, while a large one stretches or compresses the middle. It is the honest report of how true the whole scale is, and a converter with small INL earns every step it claims.

DNL · DIFFERENTIAL NONLINEARITY ideal LSB too tall step error bars

DNL · Differential NonlinearityDifferential nonlinearity measures the unevenness between neighboring steps of a converter, how much the size of one code differs from the ideal height of a single least significant bit. In a perfect converter every step would rise by the same tidy amount, but real weighted parts drift, so one step might jump too far and the next barely budge. DNL catches the worst of that local unevenness, the point where a single code is tallest or shortest compared with the ideal step. A step that is off can even be missed, making the converter skip a whole level, and the most feared number is one that turns a step into almost nothing. It is the honest look at the small print of the scale, and a converter with small DNL walks its codes one even pace at a time.

WANDER · SLOW TIMING DRIFT nominal phase tide-like sway, no fixed return edges stay crisp, the timing only drifts wander is a low-rate phase meander that builds and fades

Wander · Slow Timing DriftWander is the slow, tide-like drift of a clock timing away from its nominal place, the phase sliding gently back and forth over long stretches of time instead of staying put, often born of temperature or aging in the oscillators that beat out the stream. Where jitter is a fast nervous tremor of the edges, wander is a low, lazy sway that builds upon itself, so it is judged over a window long enough to catch the whole drift. It matters to a receiver that must keep sampling the middle of each symbol, because a wandering clock slowly slides the sampling point off the mark even when every edge stays crisp. The honest clock returns to its place and stays near it for as long as the link asks, and measuring the wander keeps a stream true that would otherwise falter in silence.

RECOVERY · CLEARANCE TO DECISION eye sample time slack room between the sampling dot and the closing traces wider eye, safer recovery, fewer slips at the edge

Recovery · Margin to DecideRecovery margin is the clearance a receiver keeps when it decides each symbol, the room between the sampling dot and the closest edge of the eye that would turn a correct choice into a wrong one. Every symbol lands not at one clean point but as a spread of overlapping traces, and the wider the opening they leave around the eye center, the safer the decision stands against noise and off-center timing. Vertical slack shows how much the level can swim before the decision flips, horizontal slack how much a wandering clock can slide before it samples the wrong span. The honest link leaves enough of both, so a noisy edge or a drifting beat never crowds the dot, and a receiver is only as strong as the margin it keeps past the last chance to slip.

CMRR · COMMON-MODE REJECTION + in − in common sway wanted leak ratio the loud shared sway fades while the small difference survives a wide ratio means the common-mode voice is rude but ignored

CMRR · Common-Mode RejectionCommon-mode rejection ratio measures how deaf a differential stage is to the noise that rides equally on both of its inputs, the wide gap between how it treats the wanted difference and how it shrugs off the shared sway. A real amplifier carries two kinds of signal: a true difference it is built to boost, and a common-mode dose that sits identically on both wires and only becomes a problem when it leaks toward the output. CMRR draws the line between them, the huge ratio of difference gain to the weak leak, so a steeper number means the amplifier hears almost none of the hum that washes over both inputs together. It is the honest measure of how clean a balanced front end stays in a noisy room, and a high CMRR lets the small signal stand out while the loud shared voice is quietly forgotten.

ISOLATION · LEAK TEST aggressive side the step throws a pulse quiet side below a brief bleed leak that fades, silence returns, the barrier held

Isolation · Transient LeakAn isolation test leans on a sudden step of interference and watches how much of that sharp jolt leaps across a barrier into the quiet side, measuring the leak that aggressors can push through in a single instant. When one circuit snaps its power, that energetic edge tries to ride stray capacitance and shared paths straight into the neighbor, and the transient flatness of the isolation says how faithfully the barrier turns the shock away. The leak looks like a narrow spike that lands on the quiet line, then settles back, and its height over the time it hangs there tells how well the two sides stay apart under a real disturbance. It is the honest check of a promise made in steady state, and a secure isolation keeps that transient leak small enough that a sudden surprise never disturbs the calm on the other side.

ADC NOISE · CONVERSION FLOOR ideal in ADC quantize steps noise floor rounding sway every perfect step rides on a small dose of rounding error

ADC Noise · Conversion FloorADC noise is the small, unavoidable whisper a converter adds to every reading, the rounding error that comes from forcing a smooth wave onto a staircase of discrete steps, meeting the faint thermal jitter of the parts inside. No converter can copy an input exactly, because it must choose one step or the next, and the gap between the true level and the chosen step falls on the output as quantization noise while the hardware adds a little of its own. Measured as a floor beneath the cleanest signal, that noise tells how faint a real reading can be before it drowns in the converter own breath. It is the honest price of turning analog into numbers, and a converter with a low floor gives back almost everything the input offered.

PHASE NOISE · SPECTRUM dBc/Hz carrier skirt rolls off offset from carrier → the edge wavers; this shows how loudly at each offset a quiet oscillator keeps the whole floor low

Phase Noise · SpectrumPhase noise is the small wander of an oscillator edge around its perfect mark, and its spectrum shows how that wander spreads as you listen farther from the carrier. Close beside the tone the noise climbs highest, piling most of the shake near the peak; farther out it falls away as the skirts roll down, so the plot reads like a sharp spike sitting on a quiet apron. Measured below the carrier in a tight band, it tells how loudly the wobble sings at each offset, and a quiet oscillator keeps the noise low the whole way across. It is the honest cough of a too-perfect tone, and a clean phase noise plot shows one sharp spike on a floor that barely whispers.

FIGURE OF MERIT · ONE NUMBER quality SNR reach BW cost power + score 72 higher wins quality and reach weighed against the power they cost one number ranks a whole shelf at a glance

Figure of Merit · One NumberA figure of merit folds several lab results into one honest number so different parts can be ranked on a single scale, pouring quality, reach and appetite into a score that climbs when a part gets better. For a converter it weighs the resolution and bandwidth against the power it takes, for an oscillator the phase noise and tuning against the same cost, so a part that is accurate yet frugal rises while one that spends power for its grace slips back. One number never tells the whole story, but it lets a chooser set many parts in order at a glance, and a good figure of merit rewards the part that does more for less. It is the honest referee of the datasheet, turning a shelf of spec rows into a single race the rivals line up on.

THD · TOTAL HARMONIC DISTORTION frequency → fundamental harmonics ride above a clean tone should stand alone on the plot the many little peaks add up to the one number

Total Harmonic Distortion · Many Peaks, One SumTotal harmonic distortion asks how much of a tone turns into unwanted echoes of itself, a pure note that should leave one clean peak on the plot but instead slips energy into little peeks at double, triple and quadruple the base. Each harmonic is a faint ghost of the signal that the part could not help breeding, and the test gathers every one of those small peaks and folds them together against the main tone, so a quiet reading means the part kept its voice mostly pure. Nothing real is perfectly clean, so a hard number says how far a tone leans on its own shadow. It is the honest leak check of an amplifier, and a low THD shows a stage that gives a tune back with barely a trace of its own breath.

SENSITIVITY · FAINTEST HEARD faint signal hearing floor ear receiver how faint can a whisper be and still be told apart sensitivity is the lowest signal the receiver still hears

Sensitivity · The Faintest HeardSensitivity asks how faint a signal may grow before a receiver can no longer tell it from the quiet that pretends to be nothing, the point where a tiny wave just barely rises past the hiss and gets believed as a real one. Below that floor the whisper is lost in the noise and no clever ear can save it, so the test turns the receiver up and finds the weakest beat it still recognizes, usually written as the level where the signal and the noise just balance. Every antenna captures some hiss, so a sensitive receiver is one that hears a fainter voice above it, not one that hears none at all. It is the honest reach of the radio, and a low sensitivity floor means a distant whisper still arrives loud enough to be counted.

NOISE DENSITY · HIS PER HERTZ per hertz avg floor 1 Hz the hiss in a single hertz before any signal arrives a low floor means a quiet receiver at every width

Noise Density · The Hiss Per HertzNoise density asks how much hiss a receiver draws in a single hertz of bandwidth, the quiet underneath everything that never goes away no matter how still the room. Measured per hertz it separates the native floor from the widening a wider band brings, because twice the width gathers twice the hiss while the floor itself stays. A quiet density means a clean start, and it lets an engineer tell how much of the noise is the part own voice and how much is borrowed from the world. It is the honest whisper of the receiver, and a low noise density is the quiet a good front end earns before a single signal gets to ride along.

REFERENCE DRIFT · SLOW WANDER ideal drift cold → hot a fixed anchor that inches as the world warms and cools small drift keeps every measurement honest across time

Reference Drift · The Slow WanderReference drift is the slow inch of a fixed voltage against the ideal mark as the weather or the years lean on it, a steady anchor that ought to stand still yet walks a little with each change of warmth. The danger is not the tiny move itself but the way it rides onto every reading that trusts that anchor, turning one quiet error into a whole row of off-scale results. A low drift means the reference barely budges across its useful range, so a converter or synthesizer keeps its promise over time. It is the patient honesty of the measurement, and a small drift figure is the still a benchmark must keep while the world around it moves.

EQUALIZATION · LEVEL THE TILT low high flat ripple frequency → every frequency should pass at the same height a flat plot treats the low and the high as equal kin

Equalization · Level the TiltEqualization asks how evenly a stage treats the whole band, a signal that should pass every frequency at the same height but instead gets a little tilt across its range. Where some notes arrive strong and others barely reach, the test lays a flat tone across the band and reads the ripple, so a level result means every part of the signal gets an equal hand. It is not about making anything louder, only about keeping the balance true so a note never comes out bent just because of where it sits. It is the honest leveling of the radio, and a flat equalization plot shows a stage that treats the low and the high as equal kin.

NOISE POWER RATIO · THE CROWD TEST filled wall the notch ratio of filled to empty fill the band full, then cut one quiet slot a deep clean notch means little spill into the gap

Noise Power Ratio · The Crowd TestNoise power ratio loads a band with a dense wall of noise and then cuts a single empty slot in the middle, asking how much leaked back into that quiet gap. A crowded band drives a part harder than one thin tone ever could, so this test mimics the true load, and the ratio in the slot to the filled wall tells how a part behaves when everything talks at once. The deeper the notch stays clean, the less a saturated stage spills its noise into the space. It is the honest crowd test of the radio, and a good ratio shows a part that keeps its slot quiet even as the whole band roars around it.

OUTPUT POWER · THE DELIVERED FORCE stage out load R watts real delivery the watts that truly land, not the watts promised after every loss is paid, what is left is the power

Output Power · The Delivered ForceOutput power is the force a stage actually delivers to the load, not what it might promise, the real watts that reach the far end of the wire after every loss is paid. Measured as power it asks how much useful delivery remains, and a part can be loud and yet wasteful, spending most of its strength on heat along the way. The test drives the load and reads what truly lands, so a high useful power means the signal arrives strong at the door of the next stage. It is the honest delivery of the radio, and a clean power number is the real weight the signal carries when it finishes its trip.

SLEW RATE · THE CLIMB SPEAKS wanted actual ramp slope = rate a stage cannot jump, it climbs at its own speed a slow slew turns a crisp edge into a lazy rise

Slew Rate · The Climb SpeaksSlew rate is how fast an output can swing, the steepest climb a stage can manage in a single breath, measured in volts per instant of time. When a sharp step tries to jump instantly, the part cannot obey all at once and settles for a tilted ramp, its slope showing how quickly it truly moves. A slow slew turns a crisp edge into a lazy rise and leaves a signal blurred where it should be sharp. It is the honest pacemaker of the stage, and a fast slew means an output that turns around at the first word without dragging its feet.

OUTPUT LATCH · THE HELD WORD data latch held till edge ck held · q one value steps in at the edge and refuses to wobble the input may dance, the output stays where it is put

Output Latch · The Held WordAn output latch holds one value fast at the command of a clock, capturing the data that is present when the timing edge arrives and freezing it at the output until the next edge. Even if the input changes right afterwards, the output stays unhurried, refusing to move until the clock gives the word again. It is how a stage remembers a momentary reading and keeps that number steady for everything downstream that wants to rely on it. It is the honest gatekeeper of the circuit, and a clean latch means a value that steps in at the agreed instant and does not wobble while it waits.

STEP SETTLING · THE CALM AFTER THE LEAP tol band target settling the leap may ring, but calm is the moment it is trusted a short settling time holds its silence after the jump

Step Settling · The Calm After the LeapStep settling is how quickly an output makes its peace after a sudden jump, the time it takes to leap toward a new value, overshoot a little, and settle back into a narrow band around the target. A fast response may ring or bounce before it calms, and the test watches until the wiggle stays inside the tolerance window for good. It is the honest composure of the stage, and a short settling time means an output that takes the leap and then holds its silence, not one that keeps echoing long after the jump.

CARRIER · THE CENTER MARK side carrier side kept low the useful message sits beside, not on, the center line a low center mark leaves the room for the sides to sing

Carrier · The Center MarkThe carrier is the constant center the message rides around, the tall unmodulated line that carries no news of its own but holds the radio signal up like a pedestal. In a good modulated signal the useful information is carried in the side bands beside the carrier, so the test asks how much of that center pedestal really needs to stay. A leftover carrier that stands too tall wastes power and drifts, while the message lives in the wings. It is the honest anchor of the radio, and a well-kept carrier is strong enough to hold the signal up yet low enough to let the message beside it be heard.

AMPLITUDE MODULATION · THE RIDE the message the carrier rides to match the slow wave lifts the fast one, and both carry the news matching widths mean the message peaks where the carrier grows

Amplitude Modulation · The RideAmplitude modulation carries a slow message by lifting and lowering a fast carrier, the gentle wave on top setting how tall each beat of the carrier below may grow. The message is not the carrier itself but how its width swells and shrinks in step with the sound above. A good modulation threads the two waves together so every swing of the voice is traced by a matching stretch of the carrier. It is the honest ride of the radio, and a clean modulation carries the message easily, each peak bowing in step with the tone that asks for it.

CHANNEL BANDWIDTH · THE OPEN SPAN bandwidth the span the channel holds open for its message to pass too narrow clips the tune, too wide lets the neighbors in

Channel Bandwidth · The Open SpanChannel bandwidth is the width of the door a channel holds open, the span of frequencies along the axis where the signal can pass while the edges fall away outside. A message needs room enough for its fastest turns, so the test asks whether the open span fits the tune without clipping its quick edges or letting the neighbors leak in. A channel swept too narrow cuts off a voice mid-word, while one swept too wide opens the door to strangers. It is the honest doorway of the radio, and a well-chosen bandwidth is just wide enough to let the message through whole and narrow enough to keep every other one out.

TRANSIENT RESPONSE · THE SETTLING step new level output rise rings the output climbs, overshoots a little, then finds its level a calm transient reaches the mark fast without wobbling too long

Transient Response · The SettlingTransient response is how the output behaves in the instant a change arrives, the climb, the overshoot and the settling waves that follow the moment a quiet line is ordered to a new level. When the demand jumps, no stage can arrive at once, so the test watches the road it takes: how quickly it rises, how far it overshoots, and how soon it stops ringing and rests at the true value. A slow response drags its feet toward the mark, while one that swings too wild overshoots and wobbles. It is the honest pace of the circuit, and a good transient climbs briskly, bows no more than a little, and settles to the steady level without ever losing its temper.

COMMON-MODE VOLTAGE · THE SHARED LEVEL two lines at once the shared rise baseline both lines ride up together, and that ride is common to both the helpful part is the difference, the nuisance rides the shared level

Common-Mode Voltage · The Shared LevelCommon-mode voltage is the part of the picture that a pair of signal lines carry together, the shared height both wires ride when they rise and fall by the same amount at once. A useful differential signal shows up as the difference between the two lines, while the common-mode part is the level they both drift on together. If that shared level climbs or wavers, it rides along on both sides and can trouble the stage that reads their difference. It is the honest platform of the radio, and a good receiver ignores the shared lift it does not need and listens only to the difference that carries the news.

DIFFERENTIAL PHASE · THE SHIFT BETWEEN first track second track the shift same beat, but one trail is a step behind the other measuring the lag between the two tracks tells the timing truth

Differential Phase · The Shift BetweenDifferential phase is the step between two tracks that beat at the same pace, the lag one wave carries behind its partner measured along the axis when both start from the same tick. Two signals that should line up peak for peak may drift instead, one arriving an instant after the other, and the test asks how far apart they wander. That shift holds its own meaning in systems that read time from a wave, so a drift tells where a stage has quietly lost its timing. It is the honest clockwork of the radio, and a proper differential phase keeps the two tracks stepping together so the news they carry stays in step.

TRACKING · THE FAITHFUL FOLLOWER the drifting target the follower the follower hugs the target close wherever it wanders small gaps show it correcting to stay on the moving mark

Tracking · The Faithful FollowerTracking is how closely a follower stays on a moving target, the match between a wandering drift and the line that chases it across the plot. A signal that slides slowly with temperature or time must be caught and followed, so the test asks whether the helper line keeps its grip as the target turns and veers. A follower that lags or overshoots loses the prey when it moves fast, while a true one stays within arm's reach at every bend. It is the honest hound of the circuit, and a well-set tracking loop follows the drift faithfully, holding the moving mark in sight through every swing so nothing is lost along the way.

LATCH · THE FROZEN VALUE input changes freely hold when told, freeze held steady even as the input roams, the held line refuses to move the latch keeps the last true value until it is told to open

Latch · The Frozen ValueA latch holds one value under guard, a small gate that lets the input through while it is open and then shuts, freezing the last true level so it stays steady no matter how the input wanders. When a stage needs to remember a number at a chosen instant, the latch snaps shut at that moment and keeps the value motionless through every later change. It does not judge the number, only honors the instant it was asked to remember. It is the honest keeper of the circuit, and a clean latch holds what it was told with no drift, so the value it guards stays trustworthy however loudly the world outside may stir.

GAIN MARGIN · THE ROOM BEFORE RING gain the spare room how far the loop sits from the tipping point of a ring handsome margin means calm, a thin one risks a howl

Gain Margin · The Room Before RingGain margin is the spare room a loop keeps before it would tip into ringing, the hollow that stays between the stage's gain at its critical turn and the line where an echo of itself could grow into a howl. A loop that swings back on itself can break into a steady song of its own, so the test asks how much quiet space remains before that tipping point. A generous margin sits far from the edge and stays calm, while a thin one hovers menacingly close to a self-sung whistle. It is the honest balance of the circuit, and a good gain margin holds back enough strength from the edge that the loop answers obediently and never improvises a tune of its own.

STANDBY · THE AWAKE SLEEP at work at rest the work stops, but a thin thread of life keeps on resting well wastes little, yet stays ready to leap awake

Standby · The Awake SleepStandby behaviour is how a stage rests without dying, the quiet state where the busy work stops yet a thin thread of power keeps flowing so the machine can leap awake in an instant. A good standby spends only a trickle while it sleeps, guarding enough life to answer a call without burning the store. The test asks how calm that rest is: a sleepy stage that still drains too much is a wasteful sleeper, while one that leans too far back may not wake when tapped. It is the honest sleep of the circuit, and a well-kept standby slumbers lightly, spending barely a whisper yet ready at the first knock to throw the door open and go back to work.

FREQUENCY MODULATION · THE HURRYING BEAT the message the carrier rushes to match crowded ticks mark the high note, spaced ones the low the speed of beating carries the news, not the height

Frequency Modulation · The Hurrying BeatFrequency modulation carries a slow message by hurrying and slowing a fast carrier, the gentle wave on top deciding how quickly the ticks below crowd together or spread apart. The news is not tallness but pace: where the message rises, the beats squeeze close and the pitch lifts, and where it falls, they fan out and the pitch settles. It holds its meaning safe from changes in loudness, since a roar or a whisper does not bend the timing of the ticks. It is the honest tempo of the radio, and a clean frequency modulation passes the message without ever raising its voice, the story told in how fast the wave beats.

LOAD REGULATION · THE STEADY RAIL rail at rest load pulls small sag the rail holds its height even as the demand grows a tiny bow for a big load is the mark of a firm rail

Load Regulation · The Steady RailLoad regulation is how well a supply holds its height when the demands upon it grow, the measure of how little the rail bows under an extra weight. When a connected load suddenly asks for more, no supply is infinite, so the test asks how far the rail sags in answer. A firm rail barely dips, lending the added current while its voltage stays steady, while a weak one sags noticeably and starves the gear it feeds. It is the honest spine of the circuit, and good load regulation means the rail holds its promise through every thirst, so a stage leaning on it sees a steady level however loudly the load calls for more.

ESD · THE SUDDEN CRACK a sudden crack the chip one tap from a dry hand can carry a hidden thunderbolt the guard turns the crack aside before the tender core feels it

ESD · The Sudden CrackElectrostatic discharge is the hidden thunderbolt a dry hand can carry, a sudden crack of heat and current that leaps across a fingertip into the pins of a chip and could wound the tender circuitry within. A spark too faint to feel at the finger may still be fierce enough to ruin a fine gate, so the test asks whether the guard paths turn the crack aside before it reaches the core. A well-guarded device shrugs off the shock and carries on, while a bare one may fail at a touch. It is the honest armor of the circuit, and a good ESD defence shepherds the sudden crack away from the tender parts, so the chip survives the dry handshake and stays whole.

PEAK-TO-PEAK · THE FULL SWING the full swing from the highest crest to the lowest trough, head to toe the whole distance the wave strides in one breath

Peak-to-Peak · The Full SwingPeak-to-peak is the whole distance a wave strides in one breath, the full measure from the highest crest of a swing down to its lowest trough. Where a single peak tells only how high a wave climbs, the peak-to-peak span holds both ends of the journey in one number, head to toe. A stage asked to carry a wave must reach both the top and the bottom of that full stride, so the test measures how far the signal demands to travel. It is the honest tape of the circuit, and a clean peak-to-peak reading shows the true breadth of a swing, giving every stage the measure of the road it must ride.

HUMAN BODY MODEL · THE DRY HAND hand the chip takes the touch one dry hand can release a sudden store of borrowed charge the test imitates that touch to see if the chip stays whole

Human Body Model · The Dry HandThe human body model is the standard way to imitate the dry hand, a small test that charges a capacitor the way a person gathers static and then flicks it into a chip pin, asking whether the device can survive one practiced touch. A human walking on, say, a breezy carpet can store a surprising store of borrowed charge, and the moment that hand nears a pin the whole load rushes out in a sharp blink. The test copies that blink with care, through a set resistance and capacitance, so every device is tried by the same honest hand. It is the fair examiner of static, and a chip that walks away whole from the dry touch earns the trust that carries it into the field.

CROSSTALK · THE QUIET LANE its own news kept to its lane a busy neighbour whispers, but the quiet lane stays true the barrier turns the borrowed wish aside before it leaks

Crosstalk Prevention · The Quiet LaneCrosstalk prevention keeps each lane true to its own news, the test that watches whether one lively channel leaks a borrowed whisper into a quieter neighbour and muddies the word it meant to keep clean. Signals ride close together on a crowded board, and a busy channel always wishes to borrow a little of its strength, yet that stray spill can turn a clean reading into a confused one. The barrier that separates the lanes turns that wish aside before it reaches home. It is the honest keeper of the quiet lane, and a board that holds back the borrowed whisper lets every channel speak its own message plainly, so the near presence of a busy neighbour never robs the quiet lane of its name.

BUS CONTENTION · ONE VOICE AT A TIME driver A driver B collide two voices on one road can only end in a shout no one meant the test begs only one party to drive the shared lane at a time

Bus Contention · One Voice at a TimeBus contention is what a shared lane suffers when two voices try to speak at once, the test that watches a driver reached for the same road and asks whether only one party is allowed to pull it at any moment. On a crowded bus, two drivers gazing at the same line may both let go of the rail at the wrong beat, and their clashing pulls can tear a clean word into a shout no one meant. The safe bus grants the shared line to one voice and keeps the others waiting at the gate. It is the honest traffic warden of the circuit, and a board that never lets two hands grab the same rail keeps every word whole, so the shared road stays calm and only one speaker is heard at a time.

HANDSHAKE TIMEOUT · THE WAITING STAGE sender the limit of patience a stalled friend is only worth waiting for up to a deadline beyond it the pair gives up the handshake and tries anew

Handshake Timeout · The Waiting StageA handshake timeout is the deadline that keeps a waiting pair from waiting forever, the test that sends a question to a friend and asks whether the slow reply comes in time or the pair cries timeout and gives up the stalled exchange. In a busy circuit one party may lag, hold a lane, or simply forget to answer, and without a limit the whole conversation could freeze on a silent partner. A set of patience draws a line at a sensible beat, and past it the waiting party lets go and moves on. It is the honest alarm of the circuit, and a well-kept handshake timeout frees the talk from a speechless friend, so a stalled lane can never hold the whole story hostage.

DIFFERENTIAL SWING · THE PEAK GAP the peak gap the balanced pair strides the whole distance from mark to mark too small a swing is a faint whisper when noise roams near

Differential Swing · The Peak GapDifferential swing is the full gap a balanced pair strides between its high mark and its low mark, the test that measures how far the two mirrored traces travel from crest to valley, since that distance carries the whole signal. In a differential lane the two halves rise and fall against each other, and the clean gap between the peaks is what the far receiver reads. A healthy swing stands tall enough to be heard clearly over nearby noise, while a squeezed one turns into a faint whisper that a keen eye must strain to follow. It is the honest tape of the balanced pair, and a well-measured swing margin keeps the signal loud and clear, so the far end always sees a gap it can trust.

TERMINATION MISMATCH · THE BOUNCE HOME load the echo returns the reach uncut a load that does not match sends a wave to bounce off home the test watches how much reach it leaves unspent at the end

Termination Mismatch · The Bounce HomeTermination mismatch is what a lane suffers when its far-end load does not quite match the line, the test that watches a wave run toward the end and measures how much of the reach comes bouncing back home instead of being spent at the load. On a fast lane the endpoint must absorb the travelling energy, yet a load that differs from the line refuses a share, and the leftover turn returns as an echo that can smear the very wave it came from. The test reads that reflection to judge how well the end has drunk its fill. It is the honest scale of the lane, and a well-matched termination lets the wave finish its journey at the load, so no stray bounce travels back to trouble the source.

BURST RIPPLE · THE PULSED MARKET the allowed band each busy puff must stay inside the band the load allows too tall a ripple can starve or startle the gears it feeds

Burst Ripple · The Pulsed MarketBurst-mode ripple is how noisy the supply grows when the load works in short, busy packets instead of a steady slide, the test that watches the rail under a series of quiet and loud stretches and measures whether each busiest puff stays inside the band the load will allow. A lightly loaded supply may rest for a while and then wake to a sudden greedy burst, and that swing can let the rail jump and wobble in a way the calm moments never show. If the jump grows too tall, the gears fed by the puffed rail may starve or startle. It is the honest pulse-taker of the circuit, and a well-measured burst ripple keeps every busy packet inside its lane, so the rail stays calm even when the load gulps in short, greedy swings.

LOS · THE LOST LIGHT FLAG flag rises when the stream fades beneath a set quiet line, a flag rises the receiver cannot read words that are no longer arriving

LOS · The Lost Light FlagLoss of signal is the quiet flag a receiver raises when the arriving light falls beneath a set level, the test that watches the stream dim and asks whether the receiver reports that the words have stopped arriving. Under a healthy beam the receiver happily reads, yet when the light fades through outage, a loose connector or a broken path, the far end cannot make sense of a silence that is no longer carrying a message. A clear flag tells the system to stop expecting and start waiting. It is the honest sentinel of the circuit, and a well-kept LOS path marks the fading stream the moment it dips, so the system never keeps reading a wordless quiet as if it were still speaking.

PPM · PRECISE TIMING PULSE one edge marks the second 1 sec ordinary beats march on around it edge error a clean edge pins the very moment the second turns its jitter decides how tightly the whole system agrees

PPM · Precise Timing PulseA precise timing pulse is the one edge a system trusts to mark a fixed instant, a clean, deliberately narrow beat that lands at the start of each exactly repeated gap and anchors every other clock to its meaning. Where ordinary clocks just tick, this pulse promises a shared moment, so the honest tell of a timing pulse lives in how reliably that single edge stays put. Its jitter, the small wander of the edge around the ideal mark, sets how tightly distant receivers can agree on the same instant, and a tiny error means every listener snaps its sample at nearly the same blessed microsecond. It is the heartbeat a whole network aligns to, and a good timing pulse keeps that one edge so steady that the others line up behind it like a choir.

CROSSTALK · NEIGHBOR COUPLING busy lane the ghost quiet victim small the loud lane gifts a bump to the calm one

Crosstalk · Neighbor CouplingCrosstalk is the leak of one signal lane into another, the unwanted copy that rides over through nearby capacitance or induction and lands inside a quiet neighbor as a small ghost of the busy one. It shows on a victim line right when the aggressor switches, a bump that appears out of nowhere and can be mistaken for a real edge. How much of the troublesome lane reaches the calm one is its coupling, and the gap between lanes, the surrounding guard, and the speed of the edges all set how loud the ghost gets. It is the price of packing many wires in a small room, and the honest route is to keep the loud lane far, the quiet one shielded, and the edges slow enough that the ghost stays too small to fool the sampler.

TIMEBASE STABILITY · AGING 0 time · age OCXO · flat TCXO · drifts ppm offset the master clock is the accuracy budget OCXO warm-up, TCXO tempco, ppm aging

Timebase stability · agingAn instrument measures time against a master oscillator, and the timebase is that clock, so its accuracy is the accuracy of everything the instrument reports. Quartz makes the usual core, cut and trimmed for a temperature coefficient, a TCXO adds compensation to flatten it over temperature, and an OCXO holds a tiny oven to keep the crystal at its best point for the highest stability, each step buying accuracy at the cost of power and warm-up. The timebase does not sit still even at fixed temperature, it ages, drifting a few parts per million over years as the quartz slowly changes, and warm-up changes it before it settles. Because time and frequency are the same thing, the timebase stability is the frequency stability, parts per million given as an offset, and for a counter or a scope that gates on it, an aging or drifting timebase turns a measured period into an error that looks like the device itself.

PROPAGATION DELAY in out tp measure both crossings on the same threshold rise and fall can pass through at different speeds

Propagation delayPropagation delay is the time a change takes to travel from a stimulus to the point you read: a digital gate from its input crossing a threshold to its output crossing a threshold, a path from one end to the other, or through a filter as a group delay. It is measured by sending a defined edge or step and watching when the response reaches a reference level, a value that is never a single clean number for a real channel, because a rising edge and a falling edge can pass at different speeds, a small signal and a large signal travel differently, and through a dispersive filter every frequency arrives with its own delay, so an edge both shifts and rounds. It sets timing margins, matched-pair delay, a cable or trace length estimate, and how much delay a PLL must carry inside its loop.

EYE PATTERN height width open eye = clean link, closed = marginal height · amplitude margin, width · timing

Eye patternAn eye pattern is every bit period of a data stream overlaid in one view, convert the same stretch of signal thousands of times and trigger each capture on the clock so all transitions pile up on the same symbol, and what emerges is a composite shape that looks like an eye. It opens where a clean one and a clean zero are well separated and closes where the signal is failing, so the eye is a single picture of the whole link. Its vertical opening is the amplitude margin, how much room noise and intersymbol interference have before they confuse a one with a zero, the eye height, and its horizontal opening is the timing margin, how wide the clean region is compared with the jitter that moves each edge, the eye width, and it is best where the eye is widest, at the center. A closed eye means the receiver cannot decide reliably, and pre-emphasis or equalization is what reopens it.

SIGNAL AVERAGING clean average signal grows like N noise grows like √N ≈+3 dB per doubling SNR improves by a factor of √N

Signal averagingAveraging trades time for clarity on a signal that repeats. Capture the same stretch again and again, aligned by the trigger, and add the samples point by point: the signal, being identical every time, piles up in phase and grows linearly with the count, while the noise, being random, grows only as the square root, so the signal-to-noise ratio improves by that square root, roughly three decibels for every doubling of the captures. Averaging removes random noise and jitter that smear the trace, so a repetitive waveform becomes clean given enough time to accumulate; it does not help a waveform that changes from shot to shot, and it leaves an interference that repeats with the signal, a synchronous hum or a fixed offset, standing because that part is not random and does not average away.

PULSE WIDTH · DUTY width tp period T duty = tp / T width is high time between 50% crossings jitter and runt distort it

Pulse width · dutyPulse width is how long a signal stays high in each period, and together with the period it fixes the duty cycle, the share of the high time, so measuring time lets you read duty and duty lets you infer the timing of a switching or a PWM signal. Width is measured between two crossings at a same level, usually the fifty-percent point, a rising edge to a falling edge, and it is where edge effects land first: a slow rise and fall eat the top of the pulse and shorten it, jitter moves the edges so the width wanders from cycle to cycle, and a runt is a width so narrow it never reached a valid level. From a captured waveform the count of samples between the crossings translates into time, and a histogram of the width over many cycles shows the average and the cycle-to-cycle spread, while a duty that differs from the commanded one reveals a controller whose timing has drifted.

LEAKAGE · TURNS RATIO Vin Np Ns Vs ratio: open Vs, read turns Ns/Np Lk: short Vs, read primary L high Lk stores the switch spike ratio + Lk set the usable window

Leakage inductance · turns ratioTwo measurements on a transformer answer most of what a converter needs to know. The turns ratio, found by applying a known voltage to the primary and reading the secondary open-circuit, reports how the actual winding counts stand against the nominal, and any mismatch is an error the design must live with. The leakage inductance, the flux that misses the opposite winding, is measured by shorting the secondary and reading the primary inductance, which then shows only the series leakage that did not couple across. High leakage stores extra energy that must be dumped each switching cycle, driving the voltage spike on a flyback or the ringing on a forward converter, and it limits how much power the core can push through. Reading ratio and leakage together gives the usable window of the transformer: how tight the two windings couple, and how much of the budget the inevitable spikes eat.

DEAD TIME · CROSS CONDUCTION HS gate LS gate dead band gap too short → shoot-through; too long → body-diode loss dead time set by gate timing circuit

Dead time · cross conductionIn a half or full bridge, the high-side and low-side switches must never be on at the same time, or the input shorts straight to ground through both — shoot-through. A dead time, where both gates are off, is inserted to cover the finite turn-off time and gate propagation. Too short a dead time risks cross conduction and a destruction of efficiency, while too long a one makes the body diode carry the current longer, adding loss and slowing commutation. Two probes on the gate waveforms, or on gate and switch node, expose the gap; timing analysis measures the interval across corners of load, temperature, and gate drive, and a switching-current probe catches any residual spike that still shoots through. Choosing a dead time at the low end of the safe window keeps the loss minimal.

OUTPUT IMPEDANCE · ΔV/ΔI vs FREQ Zout Ω freq → flat low → rises DC ESR ΔI inject ΔI → read ΔV Zout(s) = ΔV(s)/ΔI(s) · low to crossover, then ESR/loop take over lower flatter Zout ⇒ less dip on load steps, less crosstalk

Output impedance & stabilityThe output impedance ties a regulator’s small-signal behaviour to its real-world response. Inject a small alternating current into the output node and read the small alternating voltage it causes; their ratio is Zout at that frequency. Repeating the sweep maps how Zout changes with frequency. Inside the regulation loop’s bandwidth Zout stays low because the loop fights back, but past the crossover the loop can no longer compensate, and Zout climbs as the output capacitor’s ESR, ESL and the open-loop impedance take over. Where that knee sits and how far Zout rises tells whether a load demand or a neighbouring rail will drop or couple into this rail, so a lower and flatter Zout across a wider band means cleaner, better-regulated rails under real transients.

PHASE NOISE · SSB SPECTRUM carrier L(f) dBc/Hz 1/f³ flicker 1/f² white-FM noise floor offset log → L(f), in dBc/Hz, is the noise density at an offset from the carrier σφ² = 2·∫L(f)df → RMS jitter; low phase noise matters for fast clocks

Phase noise (SSB spectrum)No oscillator is a perfect single tone: small random phase fluctuations spread energy into a single-sideband spectrum around the carrier, and L(f) in dBc/Hz measures that noise density as a function of offset. It falls roughly 20 dB per decade (white frequency modulation) and closer to the carrier it steepens to 30 dB per decade (flicker), until it reaches the measurement noise floor. Because the squared RMS phase deviation equals 2·∫L(f)df, integrating the curve over the offsets of interest gives the RMS phase error, and low phase noise directly means low jitter for high-speed clocks and links.

RETURN LOSS · S11 SIG / VNA incident reflected Γ LINE / CONNECTOR ZL ≠ Z0 Γ = (ZL−Z0)/(ZL+Z0) = S11 RL = −20·log₁₀|Γ| VSWR = (1+|Γ|)/(1−|Γ|) larger RL (dB) → less reflected power → better match matching networks and clean termination push RL to 20+ dB on good links

Return loss / S11When a transmission line meets an impedance different from its characteristic impedance, a fraction of the incident power is reflected. The reflection coefficient Γ = (ZL−Z0)/(ZL+Z0) is the same complex quantity as S11: its magnitude is the reflected fraction and its phase locates the mismatch. Return loss keeps only the magnitude and reports it in dB, RL = −20·log₁₀|Γ| = −20·log₁₀|S11|, where larger values mean a better match. The same magnitude ratio sets the voltage standing-wave ratio, VSWR = (1+|Γ|)/(1−|Γ|). A well-terminated cable, connector, or antenna reaches 20 dB or more of return loss, and matching networks shrink |Γ| so less energy bounces back at the source.

SOURCE REFLECTION · BOUNCE Z0 transmission line SOURCE Zs LOAD Zl ≠ Z0 incident → reflected at Γl re-reflected at Γs Γs = (Zs−Z0)/(Zs+Z0) Γl = (Zl−Z0)/(Zl+Z0) a matched source (Zs=Z0) makes Γs=0, so only one reflection remains unmatched ends bounce the wave; each round trip scales by Γl·Γs and decays

Source reflection / multiple reflectionsWhen the load reflects part of the incident wave, that reflection travels back toward the source. If the source has a finite output impedance Zs, it does not simply absorb the returning wave — it re-reflects it with the same kind of coefficient, Γs = (Zs−Z0)/(Zs+Z0). The wave then bounces back and forth, each round trip scaled by the product Γl·Γs and smaller than the last, until it decays to nothing. With Zs matched to Z0, Γs is zero and the very first reflection suffices; with both ends mismatched, the repeated bounces slow the settle time and add ripple to the received signal, which is why source termination matters as much as load termination in high-speed links.

COMPLEX RETURN LOSS · S11 Re Im |Γ|=1 φ S11 |S11| −|S11| freq → good match dip −20 dB RL = −20·log₁₀|S11| ; phase φ locates the mismatch along the line full complex S11 maps to Z on the Smith chart; the dB value hides its sign

Complex return loss / complex S11S11 is fundamentally a complex quantity: its magnitude tells how much power comes back, and its phase locates where along the line the mismatch sits and which way the reactance goes. Return loss keeps only the magnitude and reports it in dB, RL = −20·log₁₀|S11|, so it is convenient but discards information. Sweeping S11 over frequency traces a curve whose deep dips mark frequencies where the match is best, and a fully complex measurement is needed to transform the data into an impedance on the Smith chart or to distinguish a capacitive from an inductive mismatch — the dB number alone cannot tell them apart.

SPECTRAL LEAKAGE · WINDOWING main lobe (tone) sidelobes = leakage bin / log freq N/A a non-integer cycle count spreads one tone across many bins

Spectral leakage & windowingTaking the FFT of a finite record of a sine that does not complete an integer number of cycles makes the energy leak into many sidelobes, smearing the spectrum. A window function tapers the record to zero at both ends, which removes the abrupt discontinuities and suppresses the sidelobes, trading a wider main lobe for cleaner measurement. Choosing the window (rectangular, Hann, Blackman-Harris) is a trade of main-lobe width against sidelobe level, and the resolution depends on the record length.

DE-EMBEDDING PORT 1 VNA FIXTURE delay+loss+ DUT (real) measured = fixture × DUT calibrate with known standards: OPEN — SHORT — THROUGH → extract fixture error divide the fixture terms out to recover true DUT S-parameters the same math removes probes, cables and board traces before the DUT

De-embeddingWhat a VNA measures is the connector, fixture, and DUT together, not the DUT alone. A fixture adds its own delay, loss, and reflections that hide the real device, so its contribution must be removed mathematically. By measuring known standards — an open, a short, and a through — the fixture’s error terms are characterized and then divided out of the combined data to recover the device’s true S-parameters.

NOISE FIGURE · NF SNR in (signal) G1 NF1 G2 NF2 SNR out F = F1 + (F2−1)/G1 + (F3−1)/(G1·G2) … NF = 10·log₁₀(F) = SNRin − SNRout (dB) the first high-gain stage dominates; stages after it contribute little a low-noise LNA with high gain makes everything behind it almost irrelevant

Noise figure NFNoise figure describes how much a device degrades the signal-to-noise ratio, NF = SNRin − SNRout in dB, a perfect device being 0 dB. Every stage adds noise, but the stages that matter most are the early high-gain ones. Friis’ formula weights each following stage by the gain before it, so a low-noise first amplifier with high gain makes the noise of everything after it almost irrelevant.

SETUP / HOLD TIMING MARGIN CLK tsu edge DATA valid window hold window data edge arrival must be within valid window of the clock edge setup = tsu margin, hold = th margin; both must clear the constraints at speed trace clock-to-flop delay budget shows where the margin gets eaten

Setup / hold timing marginA flip-flop samples its data on the clock edge, but the data must be stable both before (setup) and after (hold) that edge. Timing margin is the slack between the arriving data edge and these constraints: too little setup margin and slow data corrupts the capture, too little hold margin and data changing too quickly after the edge does the same. At speed only the edges matter, so a budget of delays from the source clock to each flop shows where the margin is being eaten.

PDN IMPEDANCE PROFILE Ztgt small caps mid caps bulk + board freq → Z caps of different values + ESR make parallel resonances that stay under Ztgt

PDN impedance profilePower delivery needs the impedance of the board and its decoupling capacitors to stay below a target value across the frequencies the chip switches. Capacitors handle higher frequencies but each has its own ESR and resonant behavior, so a range of values with different parallel resonances covers the band. By summing the impedances, a capacitor bank keeps the on-die voltage ripple small; the target impedance is the allowable noise divided by the transient current.

LINK JITTER BUDGET · TJ = DJ + n·σ TX RJ + DJ CHANNEL ISI + XTALK RX sampling TX 34% CH 39% RX 27% 1 UI total budget split by block → worst-case must sum with margin eye width ≈ 1 UI − TJ(BER); RJ is Gaussian → grows with BER TJ(BER) = DJ + n·σ (dual-Dirac); DJ bounded, RJ not if the shared sum lands under 1 UI the link closes, else tighten one crosstalk, ISI and CDR tracking eat the quiet part of the budget

Link jitter budgetEvery link must survive the jitter its transmitter, channel, and receiver add, and a budget divides the total allowed timing error among them. The transmitter contributes random and deterministic jitter, the channel adds intersymbol interference and crosstalk, and the receiver has its own sampling uncertainty; each is specified as a fraction of the unit interval (UI). Random jitter is Gaussian and grows with the bit-error probability you must support, while deterministic jitter is bounded, so they combine through the dual-Dirac model as total jitter TJ = DJ + n·σ, leaving an eye width of roughly 1 UI − TJ. If every block’s worst-case share stacks to less than one UI with margin the link closes; if not, one source must be tightened.

BATHTUB CURVE · BER EYE OPENING BER Q scale → flat = clean window walls rise at low BER slice eye at threshold → BER vs sample position extrapolate via Q-scale to the guaranteed BER

Bathtub curve / BER eyeSlice the eye horizontally at the decision threshold and measure the bit-error rate at every horizontal sample position, and you get two walls that rise away from the sampling point — a bathtub curve. The distance between the walls at your target BER is the usable eye-opening or timing margin; the flatter the bottom, the more room the clock can land. Plotting the walls against the Q-scale lets you extrapolate from the few bits you actually measured to the extremely low BER the link must guarantee, and the eye height contributes the vertical half of the same margin picture.

CLOCK & DATA RECOVERY noisy incoming data sample ↑ eye center PD loop VCO/pi recovered clock to sampler data early/late detector nudges the phase until samples land in the center clock is derived from the data — no separate clock line needed

Clock & data recoveryA receiver often has no clean clock to sample with, so it must recover one from the transitions of the incoming data. An early/late or bang-bang phase detector samples just before and after the expected transition, sees which side the edge fell on, and nudges a VCO or phase interpolator one step toward the eye center. The loop keeps the recovered clock locked onto the data pattern, and its timing margin equals the horizontal eye opening between the two recovered edge positions. Aging, temperature, and equalizer settings all shift the optimum, so the CDR continuously re-centers itself while the link runs.

RJ/DJ SEPARATION · TAIL FIT Q slope → σ slope → σ gap → DJ straight tail on Q-scale ⇒ Gaussian RJ; kink ⇒ bounded DJ slope of each wall = 1/σ; separation of the two walls = δ = DJ

RJ/DJ tail fittingA single histogram mixes random and deterministic jitter, but the two separate cleanly on a Q-scale plot. Because random jitter is Gaussian, each end of the histogram forms a straight line whose slope is the reciprocal of sigma; deterministic jitter is bounded, so near the peaks the curve pulls away from that straight line by an amount that grows with the DJ. Fit a line to each outer tail, read the slope for the two sigmas, and measure the horizontal gap between the fitted lines to get the deterministic separation δ. The total jitter at a target BER then follows the dual-Dirac sum TJ = DJ + n·σ, letting you budget the two components separately.

CROSSTALK · NEXT / FEXT TX RX RX TX parallel length · coupling capacitive + inductive FEXT NEXT NEXT couples back to the near source; FEXT to the far receiver wider spacing, shorter run and balanced pairs cut both

Crosstalk · NEXT / FEXTWhen two traces run close together, the changing field of the aggressor couples energy into the victim through mutual capacitance and inductance. Near-end crosstalk (NEXT) travels back toward the aggressor side and is worst when the source and the nearest victim receiver are on the same end; far-end crosstalk (FEXT) rides forward to the distant receiver and grows with the coupled length. Crosstalk appears as spurious voltage on the victim that shifts its logic level and eats into timing margin much like jitter. The standard fixes are widening trace spacing, shortening parallel runs, and routing differential pairs so odd-mode fields cancel the coupling.

SIGMA-DELTA · NOISE SHAPING in integr. ADC/bit bit out DAC feedback subtracts output DAC oversample at OSR ≫ Nyquist; loop shapes noise away in-band quantization noise ∝ 1 / OSR^(order+0.5) 1-bit quantizer + high OSR ⇒ high SNR without big ADC

Sigma-delta noise shapingA sigma-delta modulator oversamples the analog input far above the Nyquist rate and runs it through an integrator in a feedback loop with a low-resolution quantizer. Because the loop pushes quantization error out of the band of interest, the noise that would normally sit everywhere is shaped to concentrate at high frequency where a digital decimation filter removes it. In-band noise therefore falls with oversampling ratio raised to about one more than half the loop order, so even a 1-bit converter reaches high SNR. This is why audio and sensor ADCs use sigma-delta: a simple quantizer plus lots of oversampling and digital filtering beats a much larger Nyquist converter.

SETTLING TIME · OVERSHOOT 0 ±½ LSB band step slew + ring settling t = slew time + RC decay to within ½ LSB overshoot eats margin; a critically damped loop settles fastest

Settling timeSettling time is how long an output takes to enter and stay inside a specified tolerance band — often half an LSB — after the input steps. The response has two parts: first the amplifier runs at its maximum slew rate to get near the target, then it follows an exponential approach to the final value that can ring above and below. The total is the slew portion plus the RC or damped decay into the band. Too much overshoot or too slow a decay means the output is not yet accurate when the converter samples, adding error at the conversion instant. Design targets a critically damped or lightly overdamped response so it enters the band quickly without ringing.

IMPULSE / STEP RESPONSE δ input before impulse response reveals ringing & decay modes FT{h(t)} = H(jω) → bandwidth in one shot step = integral of impulse; rise time ⇔ bandwidth zero / pole positions show up as peaks & nulls used to de-embed cable & probe effects in scope work

Impulse / step responseFeed a network a very narrow impulse and its response is the time-domain signature of its transfer function: the Fourier transform of the impulse response is exactly the frequency response H(jω), so one capture reveals bandwidth, resonances and ringing. Integration of the impulse gives the step response, whose rise time is a direct measure of bandwidth through the standard product rule. Peaks and nulls in the response correspond to poles and zeros, showing where a filter or transmission path resonates or rejects. In the lab the impulse is often an approximating fast edge, and the technique is central to de-embedding the effects of the probe and cable from what is really at the device.

LOAD STEP · TRANSIENT RESPONSE Vnom ΔV dip = 1/(C·loop BW); recovery = loop settling ringing after the step ⇒ low phase margin in the supply loop load current steps from 0 to Imax → output checks regulation returns to band

Load step responseTo verify a regulator under real use, step the load current between extremes and watch how the output voltage responds. A sudden current increase drains the output capacitor, so the voltage drops, and the control loop pushes back through its finite bandwidth; the depth of the dip, the overshoot on release, and the time to return into the spec band together quantify the loop’s gain and phase margin. A short, snappy recovery with only a small excursion means the loop is fast and well damped, while a long tail or visible ringing points to inadequate crossover or low phase margin. The measurement is done at various step rates because the loop’s response depends on the frequency of the disturbance, and the output capacitor is the main lever on both dip depth and recovery.

INRUSH CURRENT AT TURN-ON Iin Ipeak = C·ΔV/Δt steady spike = many × steady; soft-start clamps it fuse must survive

Inrush current at turn-onAt the moment of power-up the input and bulk capacitors draw a large charging current, often many times the steady-state value. Measured with a current probe or a low-value shunt in the input line while the supply is turned on from a low-impedance source, inrush appears as a sharp spike whose shape is set by the circuit’s series resistance and by how much capacitance must charge. The peak value and the charging time constant decide whether the input fuse holds, the rectifier survives, or the upstream supply collapses. Soft-start and inrush-limiting circuits are verified by confirming the peak stays inside its budget across the full input and load range.

POWER-GOOD · SUPERVISION Vth PG Vout undervoltage PG asserts once Vout settles in spec; a drop deasserts

Power-good · supervisionA rail that is present but out of spec is still dangerous, so a supervisor watches the output and asserts a power-good flag only when the voltage has settled inside its tolerance. Inside, a comparator compares the rail to a threshold band, and a delay filters short glitches so the flag is not toggled by a transient dip; hysteresis keeps the comparison from chattering when the rail sits right at the edge. Downstream logic uses that flag as a gate: loads and other rails are enabled only after power-good is asserted, and a brownout, a sag or an undervoltage drops the flag and starts an orderly shutdown. The margin between the rail and the threshold is the real safety budget, so the threshold must sit far enough below the nominal rail to tolerate ripple and load steps but above the level at which the load would fail.

POWER SEQUENCING 1 2 3 t1 t2 t3 rails release in a fixed required order sequencer staggers EN by delay per rail

Power sequencingModern boards run many rails, and powering them in the wrong order can latch up devices or leave logic undefined, so a power sequencer controls the order and timing of the control signals that bring each rail up. It drives the enable of each supply with a defined delay, so a rail does not start until the one it depends on has already risen and settled; the same mechanism staggers the shutdown to prevent destructive back-powering or discharge. Sequencing is a contract expressed in time: every enable carries a sequence number and a delay, and the whole timed pattern is verified at power-up and applied on every reset. So sequencing is not about a single good rail but about the reproducible order of many, and the cost of getting it wrong is often silent, a leaky latch or a logic state that only misbehaves out in the field.

PHASE MARGIN · LOOP STABILITY gain dB freq → 0 dB unity gain → phase at unity-gain = 180° − margin; too little ⇒ ring inject a sine, sweep f, measure gain & phase around the loop phase −180°

Phase marginA feedback loop is stable only if there is enough phase left over before it would invert back to positive feedback. To measure it, inject a small sine disturbance at a test node, sweep the frequency, and record the loop gain and the phase shift all the way around the loop as a Bode plot. The frequency where the gain crosses 0 dB is the crossover; the phase there, minus the 180° the loop already carries, is the phase margin. Too little margin and disturbances ring or the loop oscillates, as a classic rule of thumb about 45° to 60° is comfortable. Because plant and load change with conditions, the margin is checked at worst-case load and temperature, not just at the nominal setpoint.

TEMPERATURE CHARACTERISTIC θ °C Vref / fosc max min datasheet band sweep the chamber, log a point each step, fit a polynomial α = (1/X₀)·dX/dθ [ppm/°C] second-order curvature shows where the peak drift lands

Temperature characteristic curveEvery reference, oscillator, and precision component drifts with temperature, and the temperature characteristic curve documents exactly how much. In a chamber the temperature is swept, commonly −40 to +125 °C, a measurement is logged at each step, and the points are fitted to a polynomial; the first-order term is the temperature coefficient α in ppm/°C, and the second-order term reveals the curvature and the temperature of peak drift. The fitted curve is then compared with the datasheet’s min/max band and with the part-to-part spread, so a design can budget the worst-case drift instead of hoping the nominal value holds over temperature.

THERMAL PATH · θJA die Tj Rθjc case Tc Rθca amb Ta Tj = Ta + P·(Rθjc + Rθca) heat in → P = V·I dissipated thermocouple or IR on the case finds Tc; θ = ΔT / P transient zth curve separates short pulses from steady heat a small heatsink lowers Rθca more than anything else force Tj below the derating limit to keep lifetime and reliability

Junction temperature & thermal resistanceA device is only as reliable as how hot its silicon runs, and the thermal path fixes that temperature. Heat flows from the junction through the package to the case and then to the air, each stage a thermal resistance; junction temperature is the ambient plus the dissipated power P = V·I times the sum of θjc and θca. Measurement uses a thermocouple or an IR spot on the case for Tc, derives θ from ΔT divided by P, and the transient thermal impedance curve tells pulses from steady heat. Keeping Tj under the derating limit is what protects lifetime, and a heatsink, airflow, or lower θja package is the lever that brings it down.

CROSSTALK · NEXT & FEXT DRIVER LOAD aggressor victim (quiet) C + M coupling NEXT FEXT at far end an aggressor signal bleeds into the quiet victim through C and mutual inductance NEXT lands at the near end, FEXT at the far end; spacing and shielding cut it

Crosstalk (NEXT / FEXT)A signal racing down an aggressor line couples into a neighboring quiet line through the stray capacitance and mutual inductance between them. The coupled disturbance arrives two ways: NEXT (near-end crosstalk) shows up back at the driven end of the victim, while FEXT (far-end crosstalk) appears at its far end, growing with line length. Either one eats into the victim’s noise budget and can corrupt a receiver, so tight spacing and good shielding are used to keep crosstalk below the link margin.

INSERTION LOSS · S21 SRC DUT cable / filter LOAD Vin Vout 0 S21 0 dB freq log → loss grows with √f dielectric floor insertion loss is how much the DUT weakens a signal: S21 = 20·log(Vout/Vin) conductor loss rises with √f from skin effect; dielectric adds a near-constant floor

Insertion loss / S21Insertion loss is how much a cable, connector, or filter weakens a signal as it passes through: the forward transmission S21 = 20·log₁₀(Vout/Vin), reported as negative dB. Conductor resistance grows with √f once current crowds to the surface by skin effect, and dielectric absorption adds a roughly constant loss per length once its dissipation factor dominates. Because the loss rises with frequency, a long link must budget the attenuation at the fastest edge, not just the bit rate it seems to carry.

INTERMODULATION DISTORTION · IP3 tones f1, f2 → IP3 f1 f2 2f1−f2 2f2−f1 frequency → power (dB) two strong tones mix → 3rd-order products appear near the passband tones

Intermodulation distortion / IP3When a nonlinear device is driven with two tones at f1 and f2, it does not just add harmonics of each tone: the two mix and produce sum and difference products. The third-order products at 2f1−f2 and 2f2−f1 are the important ones because they land close to, and push against, the original tones inside the passband, corrupting a wanted narrowband signal. On a log plot the fundamental response rises 1 dB per dB of input, while the third-order lines rise 3 dB per dB, so they converge at the third-order intercept point IP3 — extrapolated, never reached. A higher IP3 means a more linear device and less intermodulation interference.

JITTER TRANSFER FUNCTION · PLL dB 0 dB loop BW tracks input ~0 dB jitter peaking −20 dB/dec frequency (log) → below BW ≈0 dB; a little peaking near BW; above, the loop filters jitter

Jitter transfer function / PLL loop bandwidthThe jitter transfer function tells how much input jitter a device passes on to its output at each frequency. A PLL tracks slow input jitter almost perfectly, so below its loop bandwidth the transfer is roughly 0 dB; right at the bandwidth there is usually a small amount of jitter peaking, a resonance that actually amplifies some mid-frequency jitter; and above the bandwidth the loop filters, and the transfer rolls off. Designers try to keep peaking near 0 dB and set the loop bandwidth low enough to attenuate jitter at the frequencies that matter, while still tracking the slow timing wander the receiver depends on.

SMITH CHART Z |Γ|=1 r circles = constant R/Z0; x arcs = constant X/Z0 point → Z=(r+jx)Z0; distance from center → |Γ|; angle → its phase

Smith chart / complex impedance plotImpedance has a real and an imaginary part that are awkward to read on plain axis plots, so RF engineers plot it on the Smith chart, a polar map of the reflection coefficient Γ. Constant real resistance appears as circles that all pass through the same point on the right, and constant reactance appears as arcs bulging above or below the horizontal axis. Any measured impedance becomes a single point, whose distance from the chart centre is the magnitude of the reflection and whose angle is its phase, which is the same information as the return loss. Moving along the circles and arcs shows exactly what series or shunt reactive element would push the point to the centre — the perfect match — which makes the chart a working tool for designing matching networks that cut reflection.

PHASE NOISE → RMS JITTER L(f) dBc/Hz log f ∫ L(f) df ≈ −20 dB/dec floor σφ = √(2·∫L(f)df) [rad]; σj = σφ / (2π·f0) [s] integrate L(f) over the offset band; divide by 2πf0

Phase noise to RMS jitterPhase noise and jitter describe the same timing instability, and the conversion is a single integration. The single-sideband noise L(f) plots the noise power in a 1 Hz band at each offset from the carrier, in dBc/Hz; it falls roughly 20 dB per decade until it hits the noise floor. Integrating 2·L(f) over the offset range of interest gives the phase variance, and its square root is σφ in radians — the RMS phase error. Converting phase error into time error is the simple ratio σj = σφ / (2π·f0): the same phase wobble causes more time wander on a lower-frequency clock. Wider integration spans and higher noise floors both grow the result, so the stated jitter is meaningless without the integration band and the carrier frequency it depends on.

🛠️ Measurement Quick Tips

Rules of thumb for dependable readings at the bench.

Measurement Quick Tips
Voltage & currentVoltmeters connect in parallel (high impedance); ammeters connect in series (low impedance). Never place a meter in current mode across a supply.
Continuity & diode modeContinuity beeps on near-zero resistance; diode mode reads forward voltage (a good silicon diode ≈ 0.5–0.7 V).
Capacitor readingDischarge capacitors before probing. In-circuit C/ESR readings are distorted by the rest of the board — lift one leg for an accurate value.
In-circuit vs out-of-circuitParalleled parts skew readings. Isolate at least one end of a component to measure it properly.
Low resistance (Kelvin)For values below ~1 Ω use four-wire (Kelvin) sensing; lead and contact resistance otherwise dominate the error.
Scope probe tipsUse ×10 to reduce loading, keep the ground clip short, and match the probe to your scope bandwidth (e.g. 100 MHz probe ≈ 100 MHz scope).